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Semidynamics Released its 4-way Atrevido 423 RISC-V Core
AMD Readies “New Stuff” For Linux 6.6 Graphics Driver, AMDGPU DC For RISC-VRISC-V Finds Its Foothold in a Rapidly Evolving Processor Ecosystem
Re-Targetable LLVM C/C++ Compiler For RISC-V
Re-Targetable LLVM C/C++ Compiler For RISC-V
Semidynamics announces fully customisable, 4-way Atrevido 423 RISC-V core for big data applications
The release of the first two mass-produced development boards – AOSP powered by TH1520 SoC
Vitra-XS Debug & Trace Probe
Debian GNU/Linux Is Now Officially Supported on the RISC-V ArchitectureLeveraging RISC-V architecture to boost economic development
Why Maven Silicon for Upskilling Your Chip Design Workforce?
Ashling RiscFree™ C/C++ SDK support for the Zephyr Real-Time Operating System (RTOS)
HPMicro HPM64G0 – A 1 GHz RISC-V microcontroller
Selecting The Right RISC-V Core | Brian Bailey, Semiconductor Engineering
Risc-V MCUs have 8 to 20 pins
Late Night Linux – Episode 212
Bluespec collaborates with Synopsys to address growing verification demands for RISC-V design communityBluespec collaborates with Synopsys to address growing verification demands for RISC-V design communityEEVblog 1524 – The 10 CENT RISC V Processor! CH32V003Selecting The Right RISC-V Core$4 Sipeed M0S Dock IoT development board features BL616 WiFi 6, BLE 5.2, and Zigbee RISC-V microcontrollerGraalVM Native Image meets RISC-VRunning Plasma on VisionFive-2
Kung-Fu Perribot with RISC-V
Semidynamics Released its 4-way Atrevido 423 RISC-V CoreBarcelona, Spain. Semidynamics released its 64-bit flexible 4-way Atrevido 423 RISC-V core delivering double the instructions than the 2-way, 223 core. More functioning units are utilized…
AMD Readies “New Stuff” For Linux 6.6 Graphics Driver, AMDGPU DC For RISC-VSent out today was a batch of "new stuff" for the AMDGPU and AMDKFD kernel graphics drivers for queuing in DRM-Next ahead of the Linux…
RISC-V Finds Its Foothold in a Rapidly Evolving Processor EcosystemDevelopers have grown up hearing ARM or x86 being the guts of PCs and servers, but an alternative architecture called RISC-V is emerging. In the next few…
Re-Targetable LLVM C/C++ Compiler For RISC-VRISC-V is a modular instruction set architecture (ISA) with great customization capabilities that enable innovation and differentiation without fragmentation. On top of the baseline modules…
Re-Targetable LLVM C/C++ Compiler For RISC-VRISC-V is a modular instruction set architecture (ISA) with great customization capabilities that enable innovation and differentiation without fragmentation. On top of the baseline modules…
Semidynamics announces fully customisable, 4-way Atrevido 423 RISC-V core for big data applicationsBarcelona, Spain – 20 July, 2023. Semidynamics, the only provider of fully customisable RISC-V processor IP, has launched the next member of its Atrevido family…
The release of the first two mass-produced development boards – AOSP powered by TH1520 SoCBy: Han Mao Last year at the RISC-V Summit, China, T-Head introduced the high-performance SoC prototype TH1520 based on the C910 processor. This prototype has…
Vitra-XS Debug & Trace ProbeVitra-XS is Ashling’s Debug & Trace Probe for embedded development with support for multiple target architectures including RISC-V, Arm and Synopsys ARC powered systems. Vitra-XS works with Ashling’s RiscFree™…
Debian GNU/Linux Is Now Officially Supported on the RISC-V ArchitectureThe Debian Project announced today that the RISC-V (riscv64) hardware architecture is now officially supported by the Debian GNU/Linux operating system. Until today, Debian was officially supported…
Leveraging RISC-V architecture to boost economic developmentThe revolution in computing is unfolding in an unlikely place – not just in the world’s Silicon Valley but potentially in third-world countries. The harbinger…
Why Maven Silicon for Upskilling Your Chip Design Workforce?By: Sivakumar PR My recent article, ‘Chip War without Soldiers’ explained the importance of upskilling and preparing the chip design workforce in this current scenario,…
Ashling RiscFree™ C/C++ SDK support for the Zephyr Real-Time Operating System (RTOS)By Hugh O’Keeffe, Ashling Ashling’s RiscFree SDK provides full support for the Zephyr RTOS running on RISC-V based IP cores and devices including debug support…
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HPMicro HPM64G0 – A 1 GHz RISC-V microcontrollerYesterday, I ended up on the HPMicro website showing the illustration above about a 1 GHz MCU called HPM64G0. It looked interesting enough so I…
Selecting The Right RISC-V Core | Brian Bailey, Semiconductor EngineeringWith an increasing number of companies interested in devices based on the RISC-V ISA, and a growing number of cores, accelerators, and infrastructure components being…
Risc-V MCUs have 8 to 20 pinsCalled the CH32V003 series, they are based on the company’s own QingKe RISC-V2A core with a hardware interrupt stack and two-level interrupt nesting, supported by…
Late Night Linux – Episode 212The rise of RISC-V continues apace, we bust a recent ZFS myth, hybrid tiling in Plasma, Stadia departs with a nice gift for people, Joe…
Bluespec collaborates with Synopsys to address growing verification demands for RISC-V design communityIndustry-leading Synopsys VCS simulation and Verdi hardware/software debug solutions accelerate verification and validation of RISC-V cores FRAMINGHAM, MASS. (PRWEB) JANUARY 11, 2023 Bluespec Inc., announced today…
Bluespec collaborates with Synopsys to address growing verification demands for RISC-V design communityIndustry-leading Synopsys VCS simulation and Verdi hardware/software debug solutions accelerate verification and validation of RISC-V cores FRAMINGHAM, MASS. (PRWEB) JANUARY 11, 2023 Bluespec Inc., announced today…
EEVblog 1524 – The 10 CENT RISC V Processor! CH32V003Checking out the new 10 cent WCH CH32V003 48MHz RISC V processor demo board and the MounRiver Eclipse IDE. Getting to blinky. The CH32V003 is…
Selecting The Right RISC-V CoreWith an increasing number of companies interested in devices based on the RISC-V ISA, and a growing number of cores, accelerators, and infrastructure components being…
$4 Sipeed M0S Dock IoT development board features BL616 WiFi 6, BLE 5.2, and Zigbee RISC-V microcontrollerAs expected, Sipeed has now launched the Sipeed M0S IoT module based on Bouffalo Lab BL616 RISC-V microcontroller with 2.4 GHz WiFi 6, BLE 5.2,…
GraalVM Native Image meets RISC-VIt is now possible to use GraalVM Native Image on RISC-V! I will explain here how to compile applications for RISC-V and the implementation. By…
Running Plasma on VisionFive-2New year, new RISC-V Yocto blog post \o/ When I wrote my last post, I did really not expect my brand new VisionFive-2 board to find its…
Kung-Fu Perribot with RISC-VKung-Fu Perribot is my newly created toy which consists of a quadrupedal robot dog with Risc-V and control of 12 Servo motors Read the full…