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RISE to boost development of open source RISC-V software
UltraRISC Selects Valtrix STING for Verification of RISC-V SoC Designs
Compiler test update boosts Andes RISC-V in automotive
Adding RISC-V Vector Cryptography Extension support to QEMU
Linux Foundation and pals – including Intel – back software ecosystem around RISC-V | Dan Robinson, The Register
Semidynamics launches configurable RISC-V vector unit | Nick Flaherty, EENews Europe
Axiomise Launches Next-Generation formalISA App for RISC-V Processors
NOEL-V Processor’s Security Extensions for Safe and Secure Computing
Andes Technology N25F RISC-V Processor Enables Performance and Low Power for Phison X1 Enterprise SSD Controller
RISC-V International Newsletter – May/June 2023
The Linux Foundation Europe launches RISE, the RISC-V Software Ecosystem project
The RISE Of RISC-V: Accelerating Adoption Through Collaboration And Coordination
Sipeed M1s DOCK is a tiny RISC-V dev board for $11 | Brad Linder, Liliputing
$10.80 RISC-V AIoT module supports Linux | Giorgio Mendoza, Linux Gizmos
Codasip and Intel bring RISC-V development to higher-education | Codasip
Simon Davidmann President & CEO of Imperas Software elected as Chair of the OpenHW Verification Task Group
Solid Sands Announces Major New Enhancements to SuperGuardImperas RISC-V Summit Kickoff Party, December 12 2022
CAES Design Win of RISC-V/NOEL-V IP for Idaho Scientific Secure Processor for US Critical InfrastructureImperas and Andes collaborate to support RISC-V innovations
Cortus announces two new RISC-V microcontrollers (MCUs) Lotus family11 Myths About Using Formal Verification
NASA Uses RISC-V Vector Spec to Soup Up Space Computers | Chenny Wang, EE Times
Secure-IC acquires Silex Insight’s security business to accelerate its chip-to-cloud plan and develop the next-generation of embedded cybersecurity solutions
RISE to boost development of open source RISC-V softwareChip designers are at the heart of a new project to boost the development of open source software for the RISC-V instruction set. The RISC-V…
UltraRISC Selects Valtrix STING for Verification of RISC-V SoC DesignsBANGALORE, India, June 1, 2023 /PRNewswire/ -- Valtrix Systems, an industry leading provider of RISC-V design verification products for building functionally correct CPU and system-on-chip implementations, announced today…
Compiler test update boosts Andes RISC-V in automotiveAndes Technology has upgraded its version of the SuperTest Compiler Test and Validation Suite developed and supplied by Solid Sands in the Netherlands to support…
Adding RISC-V Vector Cryptography Extension support to QEMURISC-V is an open source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. Codethink has been working with the RISC-V CPU…
Linux Foundation and pals – including Intel – back software ecosystem around RISC-V | Dan Robinson, The RegisterLinux Foundation Europe and a number of big names in tech have banded together to drive development of a comprehensive software ecosystem that supports the…
Semidynamics launches configurable RISC-V vector unit | Nick Flaherty, EENews EuropeSemidynamics in Spain has developed a highly configurable out of order vector unit with a new architecture to boost performance of RISC-V processor designs, and…
Axiomise Launches Next-Generation formalISA App for RISC-V ProcessorsLONDON, June 01, 2023 (GLOBE NEWSWIRE) -- Axiomise, the leading provider of cutting-edge formal verification solutions that include training, consulting, services and custom apps, today launched…
NOEL-V Processor’s Security Extensions for Safe and Secure ComputingSafety and security are increasingly important aspects when designing computer systems, and work is carried out within RISC-V International technical groups to establish specifications that…
Andes Technology N25F RISC-V Processor Enables Performance and Low Power for Phison X1 Enterprise SSD ControllerAndes Technology Corp. announces that the AndesCore N25F processor has been adopted by Phison Electronics Corp.’s PCIe Gen4x4 SSD controller X1 (PS5020-E20) for the enterprise SSD market. Read the full press release.
RISC-V International Newsletter – May/June 2023Message from RISC-V International The growth and reach of the RISC-V ecosystem continues to inspire me during 2023! We are seeing incredible adoption across a…
The Linux Foundation Europe launches RISE, the RISC-V Software Ecosystem projectThe Linux Foundation Europe, the relatively new European arm of the Linux Foundation foundation of foundations, today announced the launch of the RISC-V Software Ecosystem (RISE) project.…
The RISE Of RISC-V: Accelerating Adoption Through Collaboration And CoordinationIn an attempt to accelerate RISC-V adoption, a global consortium of industry leaders has banded together to form the RISC-V Software Ecosystem (RISE) Project. According…
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Sipeed M1s DOCK is a tiny RISC-V dev board for $11 | Brad Linder, LiliputingDisclosure: Some links on this page are monetized by the Skimlinks, Amazon, Rakuten Advertising, and eBay, affiliate programs. All prices are subject to change, and this article only reflects…
$10.80 RISC-V AIoT module supports Linux | Giorgio Mendoza, Linux GizmosThe Sipeed M1s is a compact module integrating the Bouffalo Lab BL808 RISC-V SoC module along with a NPU. The device also provides WiFi/BL, 802.15.4 Zigbee connectivity…
Codasip and Intel bring RISC-V development to higher-education | CodasipThe Codasip University Program joins Intel® Pathfinder For RISC-V Codasip, the leader in processor design automation and RISC-V processor IP, today announced it is collaborating…
Simon Davidmann President & CEO of Imperas Software elected as Chair of the OpenHW Verification Task GroupOxford, United Kingdom – December 5th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Simon Davidmann has been elected as Chair of…
Solid Sands Announces Major New Enhancements to SuperGuardAmsterdam, The Netherlands – December 2, 2022 – Solid Sands, the world-leading provider of testing and qualification technology for compilers and libraries, announces a major new…
Imperas RISC-V Summit Kickoff Party, December 12 2022Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced the Imperas RISC-V Summit Kickoff Party 2022. Start off the RISC-V Summit…
CAES Design Win of RISC-V/NOEL-V IP for Idaho Scientific Secure Processor for US Critical InfrastructureCAES, a leader in advanced mission-critical electronics for aerospace and defense, announced that it has won its first commercial U.S.-based license for its RISC-V/NOEL-V processor IP with Idaho…
Imperas and Andes collaborate to support RISC-V innovationsOxford, United Kingdom – November 29th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Andes Technology Corp., a leading supplier of performance-efficient and…
Cortus announces two new RISC-V microcontrollers (MCUs) Lotus familyMontpellier, France – November 28, 2022 – Cortus, an innovative French fabless semiconductor manufacturing group today announces two new RISC-V microcontrollers (MCUs). They are designed…
11 Myths About Using Formal VerificationAxiomise’s Dr. Ashish Darbari dispels a host of myths to highlight the advantages of formal verification for IC design. What you’ll learn: How formal verification…
NASA Uses RISC-V Vector Spec to Soup Up Space Computers | Chenny Wang, EE TimesWith the growing demand for applications that require multiple cores and AI, ML, and computer vision capabilities, faster and power-efficient processing is essential. At the…
Secure-IC acquires Silex Insight’s security business to accelerate its chip-to-cloud plan and develop the next-generation of embedded cybersecurity solutionsThe RISC-V member @Secure-IC has announce the acquisition of @Silex Insight security business (also a RISC-V member) to accelerate its Chip-To-Cloud plan and develop the…