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RISC-V: Dividing efficiently across different hardware
Esperanto runs generative-AI on RISC-V
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunitySecure RISC-V accelerator startup VyperCore raises £4 million
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research Community
Semidynamics Unveils First Customizable RISC-V Cores for End Users
Accelerate Your Success by Joining RISC-V Membership
Raising RISC-V processor quality with formal verificationSpanish startup performs RISC-V open core surgeryProcess agnostic fully customisable RISC-V IP coresScientists Broke a Major Computer Design Barrier — And It Could Change Tech As We Know It10 Breakthrough Technologies That Will Profoundly Affect Our Lives
Pine64’s RISC-V Ox64 Takes On Raspberry Pi Pico W | Ian Evenden, Tom’s Hardware
PINE64 Unveils the Ox64, a Low-Cost Dual-Core RISC-V Single-Board Computer with Breadboard Support | Gareth Halfacree. Hackster.io
Pine64 Ox64 SBC to feature BL808 64-bit/32-bit RISC-V multi-protocol WiSoC with 64MB built-in RAM | Jean-Luc Aufranc, CNX Software
Intel’s Horse Creek dev board features SiFive P550 RISC-V processor and 8GB RAM | Brad Linder, Liliputing
It’s Time to Consider RISC-V | Rob Enderle, SD TimesVisionFive 2 RISC-V Board Available For Pre-Order | Ian Evenden, Tom’s Hardware
China may prove Arm wrong about RISC-V’s role in the datacenter | Tobias Mann, The RegisterVisionFive 2 RISC-V single-board computer is up for pre-order for $56 and up | Brad Linder, LiliputingAlibaba T-Head TH1520 RISC-V processor to power the ROMA laptop | Jean-Luc Aufranc, CNX Software
Dev board for 32bit GigaDevice RISC-V | Steve Bush, Electronics WeeklyLinux 6.0 release – Main changes, Arm, RISC-V, and MIPS architectures | Jean-Luc Aufranc, CNX SoftwareSiFive has licenses C++ library for Risc-V | Steve Bush, Electronics Weekly
RISC-V: Dividing efficiently across different hardwareAuthor: Paul Curtis In previous blog posts I have described the division algorithms SEGGER implemented in emRun. However, which algorithm is best (in terms of…
Esperanto runs generative-AI on RISC-VEsperanto Technologies Inc. (Mountain View, Calif.) has announced it has ported a range of generative AI models to its RISC-V hardware. Initial work includes running…
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunityMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence solutions based on the RISC-V instruction set, today announced that it…
Secure RISC-V accelerator startup VyperCore raises £4 millionVyperCore Ltd. (Bristol, England), a startup with plans to develop novel processor technology, has raised £4 million (about US$5 million) in seed funding. The company…
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunityMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence solutions based on the RISC-V instruction set, today announced that it…
Semidynamics Unveils First Customizable RISC-V Cores for End UsersAt its heart, the RISC-V movement centers around the idea of democratizing processor design. With an open-source instruction set architecture (ISA) and a plethora of resources…
Accelerate Your Success by Joining RISC-V MembershipRISC-V is truly inevitable. The forecasts and growth of RISC-V across the industry are growing at an unprecedented rate. As the demand and opportunity for…
Raising RISC-V processor quality with formal verificationBy Laurent Arditi, Codasip During the development of a mid-range complexity RISC-V processor, you can discover hundreds or even thousands of bugs. As you introduce…
Spanish startup performs RISC-V open core surgerySpanish startup SemiDynamics has developed fully configurable 64bit RISC-V processor IP for high-performance chip designs in AI, Machine Learning (ML) and High-Performance Computing (HPC). The…
Process agnostic fully customisable RISC-V IP coresSemidynamics has announced the first, fully customisable, 64-bit RISC-V family of cores that are ideal for handling large amounts of data for applications such as…
Scientists Broke a Major Computer Design Barrier — And It Could Change Tech As We Know ItEven if you’ve never taken a coding class, you’ve probably heard of computer programming languages like Python, C++, JavaScript, and HTML. (Bonus points if you’re familiar with…
10 Breakthrough Technologies That Will Profoundly Affect Our LivesAdvances in technology will continue to affect our lives in myriad ways. Technology Review magazine recently picked ten of the potentially most important ones. Let's…
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Pine64’s RISC-V Ox64 Takes On Raspberry Pi Pico W | Ian Evenden, Tom’s HardwareThe Raspberry Pi Pico W has a new competitor in the form of Pine64’s upcoming Ox64, spotted by CNX Software(opens in new tab), which uses the increasingly popular RISC-V…
PINE64 Unveils the Ox64, a Low-Cost Dual-Core RISC-V Single-Board Computer with Breadboard Support | Gareth Halfacree. Hackster.ioWith 64MB of RAM and up to 16MB of flash, this low-cost embedded machine features an unusual chip design. Open hardware specialist PINE64 has announced…
Pine64 Ox64 SBC to feature BL808 64-bit/32-bit RISC-V multi-protocol WiSoC with 64MB built-in RAM | Jean-Luc Aufranc, CNX SoftwarePine64 Ox64 is an upcoming single board computer powered by Bouffalo Lab BL808 dual-core 64-bit/32-bit RISC-V processor with up to 64MB embedded RAM, multiple radios…
Intel’s Horse Creek dev board features SiFive P550 RISC-V processor and 8GB RAM | Brad Linder, LiliputingThe Intel “Horse Creek” developer board is compact computer board featuring 8GB of DDR5 memory, a PCIe 5.0 slot and SD card reader for storage,…
It’s Time to Consider RISC-V | Rob Enderle, SD TimesOver the last months, ARM has pulled licenses from the ARM server-focused company, Nuvia, because of Qualcomm’s acquisition of that company. Then, recently, it sued…
VisionFive 2 RISC-V Board Available For Pre-Order | Ian Evenden, Tom’s HardwareWith global stocks of Raspberry Pi not being so plentiful, Raspberry Pi alternatives are becoming more and more attractive to makers. StarFive’s VisionFive 2 RISC-V SBC that crowdfunded over…
China may prove Arm wrong about RISC-V’s role in the datacenter | Tobias Mann, The RegisterANALYSIS Arm might not think RISC-V is a threat to its newfound foothold in the datacenter, but growing pressure on Chinese chipmaking could ultimately change that,…
VisionFive 2 RISC-V single-board computer is up for pre-order for $56 and up | Brad Linder, LiliputingThe StarFive VisionFive 2 is a single-board computer with a quad-core RISC-V processor, an integrated GPU, an HDMI 2.0 port with support for 4K video…
Alibaba T-Head TH1520 RISC-V processor to power the ROMA laptop | Jean-Luc Aufranc, CNX SoftwareThe ROMA RISC-V laptop was announced this summer with an unnamed RISC-V processor with GPU and NPU. We now know it will be the Alibaba T-Head TH1520…
Dev board for 32bit GigaDevice RISC-V | Steve Bush, Electronics WeeklyMikroElektronika has launched a development board for GigaDevice’s GD32VF103VBT6 32bit RISC-V microcontroller in its SiBrain format. Mikroe is the company is behind the ‘Click’ interface…
Linux 6.0 release – Main changes, Arm, RISC-V, and MIPS architectures | Jean-Luc Aufranc, CNX SoftwareSo, as is hopefully clear to everybody, the major version number change is more about me running out of fingers and toes than it is…
SiFive has licenses C++ library for Risc-V | Steve Bush, Electronics WeeklyIC intellectual property company SiFive has licensed Segger’s emRun++ C++ library for Risc-V, a library optimised for GCC/LLVM-based tool chains and embedded systems, based on…