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Is RISC-V Ready For Supercomputing?
Xen hypervisor port to RISC-V moving – slowly, but movingCould RISC-V become a force in high performance computing?Could RISC-V become a force in high performance computing?
CPU RTL co-simulation in Renode
GreenWaves Technologies announces a €20M financing
THE First RISC-V Shot Across The Datacenter Bow
VisionFive 2 RISC-V SBC – A Raspberry Pi Killer?
FOSDEM 2023 schedule – Open-source Embedded, Mobile, IoT, Arm, RISC-V, etc… projects
NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions
Espressif adopts RISC-V for next gen EPS32s, adds Wi-Fi 6 and BT 5
What’s next for RISC V?
Costs Of Static HW Partitioning On RISC-V | Ralf Ramsauer, Stefan Huber, Konrad Schwarz, Jan Kiszka, Wolfgang Mauerer, Semiconductor Engineering
Pavilion Panel: Those Darn Bugs | Axiomise
Engineering Academy Tackles RISC-V in Next Educational Event Installment | William G. Wong, Machine Design
LeapFive launches NB2 RISC-V flagship SoC in China | Bogdan Solca, Notebook Check
Amid Chip Shortages, Companies Bet on RISC-V | Lianne Frith, All About Circuits
LeapFive NB2 is a New RISC-V Processor | Ian Evenden, Tom’s Hardware
StarFive Opens Crowdfunding for the VisionFive 2 RISC-V SBC, Starting at Just $46 | Gareth Halfacree, Hackster.io
1400 RISC-V cores for on-chip machine learning | Nick Flaherty, EE News EuropeStarFive VisionFive 2 quad-core RISC-V SBC launched for $46 and up (Crowdfunding) | Jean Luc Aufranc, CNX Software
Experimental Patches Allow Much Faster AArch64 & RISC-V Kexec Kernel Reboots | Michael Larabel, PhoronixUbuntu Announces Compatibility With Second RISC-V System | Ian Evenden, Tom’s Hardware
StarFive VisionFive 2 single-board PC with a quad-core RISC-V chip coming in November | Brad Linder, Liliputing
Is RISC-V Ready For Supercomputing?RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of…
Xen hypervisor port to RISC-V moving – slowly, but movingIf RISC-V is to become a viable processor architecture for servers, its software ecosystem will need a solid hypervisor. Which is why The Register noted in 2021 that…
Could RISC-V become a force in high performance computing?ANALYSIS | The RISC-V architecture looks set to become more prevalent in the high-performance computing (HPC) sector, and could even become the dominant architecture, at…
Could RISC-V become a force in high performance computing?ANALYSIS | The RISC-V architecture looks set to become more prevalent in the high-performance computing (HPC) sector, and could even become the dominant architecture, at…
CPU RTL co-simulation in RenodeSupport for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of…
GreenWaves Technologies announces a €20M financingGreenWaves, the French pioneer in RISC-V application processors for battery powered devices and a performance leader in AI and DSP, announces a 20 million euros…
THE First RISC-V Shot Across The Datacenter BowWhen it comes to operating systems and now CPU instruction sets, there is proprietary, there is licensable and modifiable with a standard base of functionality…
VisionFive 2 RISC-V SBC – A Raspberry Pi Killer?The VisionFive 2 is a quad-core RISC-V single board computer with an integrated GPU and up to 8GB of RAM. The board's biggest competitor isn't…
FOSDEM 2023 schedule – Open-source Embedded, Mobile, IoT, Arm, RISC-V, etc… projectsAfter two years of taking place exclusively online, FOSDEM 2023 is back in Brussels, Belgium with thousands expected to attend the 2023 version of the “Free and…
NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space MissionsNASA’s JPL (Jet Propulsion Lab) has selected Microchip to design and manufacture the multi-core High Performance Spaceflight Computer (HPSC) microprocessor SoC based on eight RISC-V…
Espressif adopts RISC-V for next gen EPS32s, adds Wi-Fi 6 and BT 5Espressif has used RISC-V cores in its latest ESP32 wireless microcontrollers: ESP32-C6 – ICs, modules and SDK imminent Dual RISC-V cores (160MHz + 20MHz), Wi-Fi…
What’s next for RISC V?First, some background. RISC V is an open-source instruction set architecture (ISA), a "free" alternative to Arm. ISAs provide a set of common, important but unglamorous "blueprints"…
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Costs Of Static HW Partitioning On RISC-V | Ralf Ramsauer, Stefan Huber, Konrad Schwarz, Jan Kiszka, Wolfgang Mauerer, Semiconductor EngineeringA new technical paper titled “Static Hardware Partitioning on RISC-V — Shortcomings, Limitations, and Prospects” was published by researchers at Technical University of Applied Sciences…
Pavilion Panel: Those Darn Bugs | AxiomiseWhile the size of a computer shrank from a mainframe to a watch, an unquestionably remarkable feat, the time to verify these complex designs hasn’t.…
Engineering Academy Tackles RISC-V in Next Educational Event Installment | William G. Wong, Machine DesignThe Sept. 8 learning event from Electronic Design will feature in-depth coverage of RISC-V architecture, hardware, software and a robust panel discussion. The open-source RISC-V…
LeapFive launches NB2 RISC-V flagship SoC in China | Bogdan Solca, Notebook CheckThe NB2 SoC includes four RISC-V cores produced by SiFive, as well as an iGPU, NPU and VPU. LeapFive employed 12 nm nodes to produce…
Amid Chip Shortages, Companies Bet on RISC-V | Lianne Frith, All About CircuitsThe RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA technology and innovate with new RISC-V solutions. Amid the…
LeapFive NB2 is a New RISC-V Processor | Ian Evenden, Tom’s HardwareHardware based on the open-source RISC-V architecture keeps coming, with the latest Chinese vendor going by the name LeapFive, as spotted in the pages of CNX…
StarFive Opens Crowdfunding for the VisionFive 2 RISC-V SBC, Starting at Just $46 | Gareth Halfacree, Hackster.ioStarFive has opened crowdfunding for its second hobbyist-focused RISC-V single-board computer (SBC), the VisionFive 2 — promising a faster device with twice the cores, a…
1400 RISC-V cores for on-chip machine learning | Nick Flaherty, EE News EuropeUntether AI in Canada has developed a AI device with over 1400 RISC-V processors called Boqueria for ‘at memory’ computing. Boqueria, discussed at the HotChips…
StarFive VisionFive 2 quad-core RISC-V SBC launched for $46 and up (Crowdfunding) | Jean Luc Aufranc, CNX SoftwareAs expected, StarFive has officially unveiled the JH7110 quad-core RISC-V processor with 3D GPU and the VisionFive 2 SBC. I just did not expect the…
Experimental Patches Allow Much Faster AArch64 & RISC-V Kexec Kernel Reboots | Michael Larabel, PhoronixFor those making use of Kexec reboots for booting to a new kernel without fully bringing down the system to reduce the server downtime from…
Ubuntu Announces Compatibility With Second RISC-V System | Ian Evenden, Tom’s HardwareThe popular free operating system Ubuntu will now be officially available(opens in new tab) on a second line of RISC-V single-board computers, this time the VisionFive(opens in new…
StarFive VisionFive 2 single-board PC with a quad-core RISC-V chip coming in November | Brad Linder, LiliputingLast year Chinese company StarFive launched a compact single-board computer called the VisionFive v1 that’s powered by a 1.5 GHz dual-core RISC-V processor. Now the company has unveiled version…