The newly released RISCstar toolchain is a pre-compiled family of GNU toolchains for RISC-V developers. It supports the entire RISC-V ecosystem, from the latest 64-bit application processors, right down to…
At RISC-V Summit North America 2025, Andrea Gallo, CEO RISC-V International, and Phil Wennblom, Chair of the ISO/IEC Joint Technical Committee (JTC 1)., announced that RISC-V International has been approved…
At RISC-V North American Summit in Santa Clara, Ashling and Embecosm today announced robust ExecuTorch implementations optimised for resource-constrained devices, including RISC-V based microcontrollers. The collaboration enables developers to deploy…
The knowledge gap for porting software to RISC-V is about to close. RISCstar Solutions, in close collaboration with RISC-V International and the Linux Foundation, has developed a comprehensive online training…
The eProcessor Project today announced the successful development and deployment of the Europe’s first out-of-order RISC-V processor silicon. The processor, manufactured in a 22nm process, represents a leap forward in…
Risky Systems’ Bob Jones explains why the company’s latest core is set to revolutionize the AI SoC market, and how it intends to use it to take the US by…
RISC-V Summit North America 2025 will bring the global RISC-V community together in Santa Clara for two days of keynotes, technical sessions, workshops, and demos.
Summary Under the theme “RISC-V: The Future of Open Hardware and Innovation,” the event brought together industry leaders, researchers, and tech enthusiasts for a full day of RISC-V insights. The…
Summary Despite a bit of rainy weather, the Tokyo RISC-V community came together at a local restaurant for a lively evening of conversation, networking, and all things RISC-V—proving that nothing…