You may have heard of RISC-V -- usually pronounced 'risk-five' -- it's an instruction set…
anishaNovember 20, 2024
News from and about the RISC-V community, RISC-V products, members, and technical accomplishments
Interested in sharing your content with the RISC-V Community?
Could you give us an overview of RISC-V's mission and why it's expanding so rapidly,…
anishaNovember 20, 2024
RISC-V is an open Instruction Set Architecture (ISA), where the ISA can be thought of as the…
anishaNovember 19, 2024
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, a leading developer of RISC-V chips and software for high-performance…
anishaNovember 18, 2024
Barcelona / Tokyo, 14 of November 2024 –Openchip, NEC and the Barcelona Supercomputing Center are…
anishaNovember 15, 2024
DeepComputing is excited to announce the launch of an exclusive early access program for the…
anishaNovember 14, 2024
Andes and Synopsys present a ‘software first’ design flow using virtual platforms/prototypes allows RISC-V developers…
anishaNovember 12, 2024
MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and…
anishaNovember 12, 2024
Formal For All! “Do I need a PhD to use formal verification?” “Can formal methods…
anishaNovember 11, 2024
What you’ll learn: The state of RISC-V, including new RISC-V announcements. A look at some…
anishaNovember 6, 2024