RISC-V was first deployed as a microcontroller or embedded processor. However, in the future, the RISC-V ISA can also power the most powerful computers as processors and accelerators. In order to do that, the ISA must have features and an ecosystem to support HPC and these features are different from what is defined as an embedded system, where the RISC-V ISA first got traction.
The RISC-V Special Interest Group on High Performance Computing (SIG-HPC) was formed to address the requirements of the HPC community and align the RISC-V ISA. The SIG is a global committee that works on enabling HPC with the RISC-V ISA and its goal is to enable RISC-V in a broader set of new software and hardware opportunities in the high performance computing space, supercomputers to the edge, and the software ecosystem required to run legacy and emerging (AI/ML/DL) HPC workloads. First, the SIG defined HPC to provide overall group scope and define the target markets, users, and applications. With this definition and scope, the interests of the SIG-HPC were rank ordered to provide high impact results, from discovery and gap analysis to implementation. In order to accomplish this, two things need to take place: 1) Plot a path to becoming competitive and 2) Extend that path to lead the community with new features and capabilities.
A broad definition of HPC from the SIG and some related commentary:
“A computer system designed to execute applications that would take days/years/centuries on a desktop/mobile device, in seconds/minutes or require weeks or months to run, even at large scale.”
Various technologies are used to achieve this speedup. Over time, newer technologies and applications will be developed with newer access methods and implementation methodologies. Some applications may consume the entire computer system, while in other scenarios the computer system may be partitioned to run many applications.
In HPC, one can expect very large main memory capacities and very large online datasets. These capabilities will be used to increase the fidelity of the answer and/or some applications will be required to provide answers in a real-time transaction environment. Access may be limited to a particular organization or globally accessible in a cloud environment.
As the HPC definition suggests, HPC is everywhere. The basic algorithms and kernels power a wide range of computations. It starts in the traditional space of supercomputers used for weather forecasting, computational fluid dynamics, to material science, and protein folding, in both research and industrial applications. We even see HPC in the cloud.
The SIG-HPC aims to enable all of those workloads and more. As a result, there are 141 members on the mailing list and 10 active research, academia, and industrial members from a wide range of organizations and these are growing exponentially. The group is united in making RISC-V an option in HPC. It also works with other technical groups in RISC-V to make sure HPC requirements are kept in mind for the evolving ISA.
For 2021, SIG-HPC’s goals are to start new initiatives, such as mapping the HPC software ecosystem to RISC-V. This involves automation to discover which open source software, from libraries to benchmarks and applications, work out-of-the-box on the RISC-V ISA. SIG-HPC is starting with the most common libraries like FFT, BLAS, and using GCC and LLVM to compile the codes. The same automation is being applied to benchmarks like HPL and HPCG as well as applications like GROMACS, Quantum ESPRESSO and CP2K. The list is growing! Based on this work, efforts can be targeted to increase library to application coverage by the RISC-V software ecosystem.
Overall, SIG-HPC’s vision is that of a future where the entire HPC system can be based on open source components. Today’s technology trends require specialization to meet the power and performance workload targets. This enables hardware-software co-design, which is a natural fit for open systems, enabling more research and development. The next major milestone for SIG-HPC is to map the HPC ecosystem and develop an associated roadmap. This is where you can get involved!
John D. Davis, Ph.D.
SIG-HPC Chair
Become a SIG-HPC member: Subscribe to the mailing list by sending email to: sig-hpc+subscribe@lists.riscv.org