RISC-V International Newsletter – November 2023

Message from RISC-V International

Greetings!

We’re in the final countdown to RISC-V Summit North America, which runs Nov. 6-8 in Santa Clara, CA. The anticipation and excitement across the ecosystem are contagious, as we bring together innovators and technical leaders from around the world. Our global RISC-V community includes technical, industry, domain ecosystem and special interests groups that come together to further showcase the power and continued adoption of RISC-V, and the products and solutions that are in the market and available now, enabling a new era of open compute.

Monday, Nov. 6 is RISC-V Member Day where technical and industry working groups meet to share updates on the status of various efforts. The next two days – Tuesday, Nov. 7 and Wednesday, Nov. 8 – feature impressive technical and industry sessions and keynotes. Speakers, including Qualcomm, Meta, Red Hat, Synopsys, My Silicon Compass and Google, address recents trends and updates in Automotive, Data Centers, Embedded, Mobile, AI/ML, Security, Software Stacks, Development Tools, Systems on a Chip, Chiplets and so much more. You won’t want to miss a single session. Plan your schedule now, the full agenda can be found here.

The RISC-V expo area features more than 40 exhibitors from all over the world showcasing their latest offerings and meeting face-to-face with customers and prospects. The expo area features a theater for special demo presentations as well as the RISC-V Developer Zone, showcasing the range of technologies available to hardware and software developers creating the next generation of computing applications.

It’s not too late to register. I can’t wait to see you all there!

Best,

Calista Redmond

CEO, RISC-V International

Technical Update

The Vector Crypto ISA Package has been ratified by the RISC-V Board of Directors.

The Additional Scalar Floating Point Fast Track Extension (Zfa) has been ratified by the RISC-V Board of Directors.

The RISC-V V extension C intrinsics ISA non-ISA specification authored by eop Chen has completed internal review.

Marketing Update

The Automotive Market Development committee shared how RISC-V is supporting the industry in a webinar, “Delivering the Future of Automotive Innovation with RISC-V,” which took place last week and can be viewed online.

Datacenter Market Development activity is currently underway as part of the Datacenter SIG, to advance awareness and adoption of the RISC-V ISA and member technologies in the Datacenter supply chain. Contact Andy Moore (andy@riscv.org) if you would like to attend.

To learn about the latest and get involved in our marketing activities, join the RISC-V Marketing Committee.

Upcoming RISC-V Events

RISC-V Summit North America (November 7-8, Santa Clara, CA) – There are so many reasons to attend this year’s summit: 15+ keynotes, 40+ technical sessions, 40+ exhibitors, 40+ boards to see, demos in our expo theater, new product introductions, cocktail receptions sponsored by Imperas and Synopsys, the collaboration breakfast sponsored by Google, and much, much more. Don’t miss it!

A HUGE thank you to our 2023 Diamond Sponsors!

To submit an event or webinar to be posted on the website, use the event submission request form on the RISC-V events page.

All of the upcoming RISC-V events can be found here!

RISC-V In the News, just a few of many we see every day:

Android and RISC-V: What you need to know to be ready – Oct. 30, 2023
Ashling and InCore announce Ashling’s RiscFree™ C/C++ SDK support for InCore’s RISC-V-based Azurite Cores – Oct. 26, 2023
Semidynamics launches first fully-coherent RISC-V Tensor unit to supercharge AI applications – Oct. 24, 2023
Research Consortium sets Standards in the Field of Open Source Hardware: Open Tools used for a Security Chip – Oct. 20, 2023
Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology – Oct. 18, 2023
Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by Google – Oct. 17, 2023
Codasip announces next-generation RISC-V processor family for Custom Compute – Oct. 17, 2023
Semidynamics and Signature IP Expand Multi-Core RISC-V and CHI Options – Oct. 11, 2023
SiFive unveils two new high-performance RISC-V processors – Oct. 11, 2023
RISC-V: Pioneering Windows Assembly – A New Era in Computing – Oct. 4, 2023
SemiDynamics teams for multicore RISC-V chiplet boost – Oct. 4, 2023
Samsung To Build Next-Gen Tenstorrent AI Chiplet Leveraging RISC-V Architecture – Oct. 4, 2023
RISC-V: Pioneering Windows Assembly – A New Era in Computing – Oct. 4, 2023
Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI Chiplet – Oct. 3, 2023
[VIDEO] RISC-V Video Editing & 500th Episode – Oct. 1, 2023
Automated Kernel Testing on RISC-V Hardware – Sept. 27, 2023
Ashling’s RiscFree™ SDK Now Supports RISC-V® Processor Cores from CAS – Sept. 26, 2023
Chipmakers, Researchers, and Hobbyists Show Off the Many Faces of RISC-V – Sept. 23, 2023
OpenHW Group Appoints Florian ‘Flo’ Wohlrab as New CEO to Spearhead Open-Source Ecosystem Advancement – Sept. 20, 2023
Esperanto Technologies Introduces First Generative AI Appliance Based on RISC-V, Enabling Developers to Easily Create and Deploy Purpose-Built Vertical Applications – Sept. 15, 2023
Esperanto Technologies Introduces First Generative AI Appliance Based on RISC-V, Enabling Developers to Easily Create and Deploy Purpose-Built Vertical Applications – Sept. 13, 2023
Bluespec’s accelerate-HLS leverages RISC-V to simplify and speed the development of HLS applications – Sept. 13, 2023
Configurable LLDB for (not only) embedded RISC-V processors – Sept. 12, 2023
Bluespec’s Accelerate-HLS Leverages RISC-V to Simplify and Speed the Development of HLS Applications – Sept. 12, 2023

RISC-V Blogs

Journeying Beyond AI: Unleashing the Art of Verification – Oct. 13, 2023
SiFive unveils two new high-performance RISC-V processors – Oct. 11, 2023
DPI support in Renode for HDL co-simulation with Verilator and Questa – Oct. 11, 2023
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow Tolling – Sept. 26, 2023
It’s Not Just About the Core, it’s Also About the System – Sept. 25, 2023
How to Design a RISC-V Space Microprocessor – Sept. 21, 2023

Do you have news or blogs we can amplify? The blog, In the News, and social media submission request form can be found on the RISC-V News & Blog page.

RISC-V Community

There are many additional areas to engage in our community building efforts:

Looking to showcase your RISC-V knowledge? Get certified with the RISC-V Foundational Associate Certification! Also available in Chinese.
Join the Academic Special Interest group where universities engage and connect
Enlist in RISC-V online training and certification, or reach out to propose and help us build new courses at learn@riscv.org
Catch up on RISC-V sessions on YouTube
Looking for a new role? Seeking RISC-V talent for your team? See open roles across the community on RISC-V Careers. Member organizations are also encouraged to list their open positions!