Next Generation Data Center Architectures to be Driven by RISC-V and Open Standards | Balaji Baktha, Ventana Micro Systems
Ventana was founded to deliver the highest performance RISC-V CPUs competitive with the best-in-class data center offerings. The company seeks to address the needs... Read more.
Open Source RISC-V: Serving a Side of Software with Chips | Agam Shah, The New Stack
The Linux of chips, the open source RISC-V instruction set architecture, has some big-name backers including Intel, AMD and Nvidia. But the software support is still... Read more.
SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore
YADRO and Syntacore hosted the first ever engineering hackathon for students in Russia. The event was organized in association with National Research University... Read more.
Who Does Processor Validation? | Brian Bailey, Semiconductor Engineering
Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds... Read more.
MNT Pocket Reform is 7 inch mini laptop with a modular, open hardware design | Brad Linder, Liliputing
The makers of the MNT Reform began shipping their modular, open source laptop to backers last year following a successful crowdfunding campaign launched in 2020.
Now... Read more.
The Future of RISC-V | Patrick Little, SiFive
RISC-V is one of the hottest technologies in semiconductors. In this session, we sit down with Patrick Little, CEO and chairman of SiFive, to discuss his views on... Read more.
Elektor Engineering Insights #3 – RISC-V | Stuart Cording, Elektor TV
What's all this #RISCV stuff about? We spoke to Martin Croome of GreenWaves Technologies and Simon Davidmann from Imperas Software to understand.
Watch the full... Read more.
Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro
The landscape of Machine Learning software libraries and models is evolving rapidly, and to satisfy the ever-increasing demand for memory and compute while managing... Read more.
Ventana Micro CEO explains next gen data centers are driven by RISC-V and open standards | Ventana Micro Systems
Next generation data center architectures are being driven by RISC-V and open standards. At the The Six Five Summit (www.thesixfivesummit.com) Ventana founder and... Read more.
Ferrous Systems and Espressif’s Rust Training on ESP32 | Espressif
Rust is currently becoming popular in embedded systems, and the support for ESP32 is being developed by Espressif and the ESP-RS community. To consolidate this trend,... Read more.