Towards an Integrated Matrix Extension: Workload Analysis of CNN Inference with QEMU TCG Plugings
Introduction
Following the gap analysis done in the second half of 2023, the Vector Special Interest Group (SIG-Vector) has been working on specifying instructions... Read more.
Longnail: Hardware Synthesis of CoreDSL Custom Instructions for MCU- and Application-Class Cores
Tammo Mürmann has just commenced his PhD studies at the Technical University of Darmstadt as part of the Embedded Systems and Applications Group (ESA). During his... Read more.
How to Share Your Work and See What Others Are Building On RISC-V
Hello RISC-V Community,
We’ve heard your feedback! Many of you expressed an interest in seeing RISC-V projects from around the world, as well as having the... Read more.
RISC-V International Statement on Spectre and Meltdown (2018)
This statement was issued in 2018, and remains accurate today. Recent articles in the media have raised awareness around the processor security vulnerabilities... Read more.