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RISC-V chip to drive next generation app store of hearables | Nick Flaherty, EENews Europe
What is the Titan M2 security chip in Google’s Pixel phones? | Calvin Wankhede, Android Authority
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFive
Arm’s push into cars ‘a logical step’ as competition grows from open-source RISC-V | Thomas Macaulay, The Next Web
How to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba Cloud
Standardized Open-Source Processor Architecture | Jon Gabay, Mouser Electronics
Allwinner D1/D1s Platform Support Moves Closer To Mainline Linux | Michael Larabel, Phoronix
MProtect: Operating System Memory Management without Access | Caihua Li, Seung-seob Lee, Min Hong Yun, Lin ZhongA Systolic Neural CPU Processor Combining Deep Learning and General-Purpose Computing With Enhanced Data Locality and End-to-End Performance | Yuhao Ju; Jie GuIP-Tag: Tag-Based Runtime 3PIP Hardware Trojan Detection in SoC Platforms | Kejun Chen; Orlando Arias; Xiaolong Guo; Qingxu Deng; Yier JinMcPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework | Jianwang Zhai; Chen Bai; Binwu Zhu; Yici Cai; Qiang Zhou; Bei YuGHAZI: An Open-Source ASIC Implementation of RISC-V based SoC | Zain Rizwan Khan, Wajeh ul Hasan, Zeeshan Rafique, Ali Ahmed Ansari, Syed Roomi Naqvi
Embedded World 2022 – the RISC-V genie is out of the bottle | Roddy Urquhart, Codasip
Renesas and SiFive Partner to Jointly-Develop Next-Generation High-End RISC-V Solutions for Automotive Applications | Tiera Oliver, Embedded Computing Design
SiFive chips into Cambridge to take on Arm in its own backyard | Tony Quested , Business Weekly
RISC-V: The Road Ahead | Stephano Cetola, RT-Thread IoT OS Global Tech Conference
Imagination launches IMG RTXM-2200 – its first real-time embedded RISC-V CPU | Imagination Technologies
Next Generation Data Center Architectures to be Driven by RISC-V and Open Standards | Balaji Baktha, Ventana Micro Systems
Open Source RISC-V: Serving a Side of Software with Chips | Agam Shah, The New Stack
Who Does Processor Validation? | Brian Bailey, Semiconductor Engineering
MNT Pocket Reform is 7 inch mini laptop with a modular, open hardware design | Brad Linder, Liliputing
The Future of RISC-V | Patrick Little, SiFive
Elektor Engineering Insights #3 – RISC-V | Stuart Cording, Elektor TV
Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro
RISC-V chip to drive next generation app store of hearables | Nick Flaherty, EENews EuropeUS startup Sonical Sound Solutions is launching an ‘app store’ for headphones and hearables at CES this week ahead of a high performance, low power…
What is the Titan M2 security chip in Google’s Pixel phones? | Calvin Wankhede, Android AuthorityWith the Pixel 6 series, Google began developing its in-house Tensor SoC. But that wasn’t the first time the search giant used a piece of custom…
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFiveLate last year, StarFive Technology released “StarFive Dubhe Linux Software Development Kit (SDK)”, which is based on the Yocto Project. It provides a flexible toolset…
Arm’s push into cars ‘a logical step’ as competition grows from open-source RISC-V | Thomas Macaulay, The Next WebChip designer Arm is rapidly expanding its automotive business, amid mounting competition from open-source rival RISC-V. Revenue from the segment has doubled since 2020, the Financial Times reports.…
How to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba CloudIntroduction T-Head has recently introduced a high-performance SoC prototyping, i.e. TH1520, which is built on the Wujian600 chip development platform. With a quad-core XuanTie C910…
Standardized Open-Source Processor Architecture | Jon Gabay, Mouser ElectronicsHow often have we had to learn a new processor architecture and development environment because our new project requires more horsepower and speed than previous…
Allwinner D1/D1s Platform Support Moves Closer To Mainline Linux | Michael Larabel, PhoronixThe D1 is Allwinner's first SoC based on a RISC-V core design. While the Allwinner D1 isn't powerful at all, it's appearance in low-cost boards,…
MProtect: Operating System Memory Management without Access | Caihua Li, Seung-seob Lee, Min Hong Yun, Lin ZhongModern operating systems (OSes) have unfettered access to application data, assuming that applications trust them. This assumption, however, is problematic under many scenarios where either…
A Systolic Neural CPU Processor Combining Deep Learning and General-Purpose Computing With Enhanced Data Locality and End-to-End Performance | Yuhao Ju; Jie GuAbstract: While neural network (NN) accelerators are being significantly developed in recent years, CPU is still essential for data management and pre-/post-processing of accelerators in…
IP-Tag: Tag-Based Runtime 3PIP Hardware Trojan Detection in SoC Platforms | Kejun Chen; Orlando Arias; Xiaolong Guo; Qingxu Deng; Yier JinAbstract: The complexity of modern system-on-chip (SoC) designs and the ever shortened time-to-market (TTM) makes the third-party intellectual property (3PIP) a cornerstone in the modern…
McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework | Jianwang Zhai; Chen Bai; Binwu Zhu; Yici Cai; Qiang Zhou; Bei YuAbstract: Power efficiency has become a nonneglected issue of modern CPUs. Therefore, accurate and robust power models are highly demanded in academia and industry. However,…
GHAZI: An Open-Source ASIC Implementation of RISC-V based SoC | Zain Rizwan Khan, Wajeh ul Hasan, Zeeshan Rafique, Ali Ahmed Ansari, Syed Roomi NaqviAbstract—Due to the closed source, expensive nature of digitaldesign tools and licensing cost of System on Chip (SoC) IPsfor ASIC, the hardware industry lacks innovation…
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Embedded World 2022 – the RISC-V genie is out of the bottle | Roddy Urquhart, CodasipThe last Embedded World was back in February of 2020, but the event was hit hard by Covid-19 with many exhibitors and visitors deciding to…
Renesas and SiFive Partner to Jointly-Develop Next-Generation High-End RISC-V Solutions for Automotive Applications | Tiera Oliver, Embedded Computing DesignRenesas provides automotive solutions including ADAS, Autonomous Driving (AD), Electric Vehicles (EV), and Connected Gateway (CoGW) to customers all over the world by utilizing its…
SiFive chips into Cambridge to take on Arm in its own backyard | Tony Quested , Business WeeklyCash rich Californian RISC-V computing company SiFive has opened a UK R & D centre in Cambridge and plans to hire more than 100 people…
RISC-V: The Road Ahead | Stephano Cetola, RT-Thread IoT OS Global Tech ConferenceStephano Cetola, Director of Technical Programs at RISCV International joined us at the 2022 RT-Thread Global Tech Conference and shared with us new updates on…
Imagination launches IMG RTXM-2200 – its first real-time embedded RISC-V CPU | Imagination TechnologiesImagination Technologies announces IMG RTXM-2200, its first real-time embedded RISC-V CPU, a highly scalable, feature-rich, 32-bit embedded solution with a flexible design for a wide…
Next Generation Data Center Architectures to be Driven by RISC-V and Open Standards | Balaji Baktha, Ventana Micro SystemsVentana was founded to deliver the highest performance RISC-V CPUs competitive with the best-in-class data center offerings. The company seeks to address the needs of high…
Open Source RISC-V: Serving a Side of Software with Chips | Agam Shah, The New StackThe Linux of chips, the open source RISC-V instruction set architecture, has some big-name backers including Intel, AMD and Nvidia. But the software support is…
Who Does Processor Validation? | Brian Bailey, Semiconductor EngineeringDefining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling…
MNT Pocket Reform is 7 inch mini laptop with a modular, open hardware design | Brad Linder, LiliputingThe makers of the MNT Reform began shipping their modular, open source laptop to backers last year following a successful crowdfunding campaign launched in 2020.…
The Future of RISC-V | Patrick Little, SiFiveRISC-V is one of the hottest technologies in semiconductors. In this session, we sit down with Patrick Little, CEO and chairman of SiFive, to discuss…
Elektor Engineering Insights #3 – RISC-V | Stuart Cording, Elektor TVWhat's all this #RISCV stuff about? We spoke to Martin Croome of GreenWaves Technologies and Simon Davidmann from Imperas Software to understand. Watch the full…
Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | AntmicroThe landscape of Machine Learning software libraries and models is evolving rapidly, and to satisfy the ever-increasing demand for memory and compute while managing latency,…