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This universal processor combines CPU, GPU, DSP and FPGA in one chip
[VIDEO] HiFive Premier P550: Powerful SiFive RISC-V Development Board
Exploring RISC-V ISA Developments and Technical Highlights from 2024Top ten articles on eeNews Europe in 2024
[VIDEO] A RISC-V vector CPU for High-Performance ComputingReviving old tech with new tech: A $0.03 RISC-V microcontroller brings an Acer N30 PDA back to life
America’s Next Chapter
[VIDEO] MIPS P8700 RISC-V Cores Target Automotive Applications
RISC-V 2024: A Year of Global Growth and Innovation
S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC[VIDEO] Why the ESP32 C6 DevKit is Perfect for RISC-V Learning
Longnail: Hardware Synthesis of CoreDSL Custom Instructions for MCU- and Application-Class Cores
Xuantie RISC-V TEE solution for MCU
RISC-V RV32I RTL Verification using UVM | Maven Silicon Blog
The First DSA Agile Development on Open Xuantie RISC-V processor
The RISC-V Mentorship Program – a 2022 Recap, What’s to Come for 2023, and How to Apply
Support for Microchip’s RISC-V Platforms in Antmicro’s Open-Source Renode Framework and BeyondRISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Run 32-bit applications on 64-bit Linux kernel | LIU Zhiwei, GUO Ren| T-Head Division of Alibaba Cloud
SpacemiT Makes Important Breakthroughs in RISC-V High-Performance Cores | SpacemiT
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFiveHow to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba CloudXuanTie C908 Accelerates AI with Software and Hardware Fusion
Xuantie RISC-V TEE solution for MCURISC-V RV32I RTL Verification using UVM | Maven Silicon BlogThe First DSA Agile Development on Open Xuantie RISC-V processorThe RISC-V Mentorship Program – a 2022 Recap, What’s to Come for 2023, and How to ApplySupport for Microchip’s RISC-V Platforms in Antmicro’s Open-Source Renode Framework and BeyondRISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Run 32-bit applications on 64-bit Linux kernel | LIU Zhiwei, GUO Ren| T-Head Division of Alibaba CloudSpacemiT Makes Important Breakthroughs in RISC-V High-Performance Cores | SpacemiTStarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFiveHow to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba CloudXuanTie C908 Accelerates AI with Software and Hardware Fusion
Synopsys RISC-V ARC-V processor IP gets Lauterbach debug and traceIntroducing fast RISC-V interrupts support in Renode for real time applicationsKVM expansion card utilizes RISC-V CPU architecture for enhanced remote PC management — Sipeed NanoKVM-PCIe now available for pre-order starting at $40RISC-V Summit to Feature, AI, Auto, RTOS and Many More Key Topics
[VIDEO] An Open-Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards
[VIDEO] Accelerate your adoption of RISC-V with CORE-V-VERIF
TetraMem Integrates Energy-Efficient In-Memory Computing with Andes RISC-V Vector ProcessorRivos Selects Andes NX45 for Control Functions in Upcoming High-Performance RISC-V SoCAndes Technology is Expanding RISC-V’s Horizons in High-Performance Computing Applications
[VIDEO] Accelerating RISC-V testbench development with open source RISC-V RTL and emulation[VIDEO] A Holistic Approach to RISC-V Processor Verification[VIDEO] The Future of Compute
This universal processor combines CPU, GPU, DSP and FPGA in one chipFor over 50 years, the semiconductor industry has relied on the Tomasulo algorithm, introduced by IBM in 1967, to build specialized CPUs, GPUs, and other chips tailored…
[VIDEO] HiFive Premier P550: Powerful SiFive RISC-V Development BoardSiFive HiFive Premier P550 RISC-V development board review and demos. You can learn more about the board on its web page here: https://www.sifive.com/boards/hifive-... Note that…
Exploring RISC-V ISA Developments and Technical Highlights from 20242024 has been a year of great technical progress for the RISC-V ISA. Our 75 Committees and Groups, staffed by contributors from RISC-V member organizations…
Top ten articles on eeNews Europe in 2024The march of the RISC-V architecture continued through 2024, with neuromorphic computing from Innatera in the Netherlands and a universal processor that combines the functions…
[VIDEO] A RISC-V vector CPU for High-Performance ComputingAbstract The European Processor Initiative (EPI) is a project dedicated to developing a general-purpose processor and an accelerator, alongside the necessary software layers for their…
Reviving old tech with new tech: A $0.03 RISC-V microcontroller brings an Acer N30 PDA back to lifeThe Acer N30 is a PDA released in 2004 that shipped with a 240 x 320 pixel resistive touchscreen display, a 266 MHz Samsung S3C2410 processor, and…
America’s Next Chapter"Life, liberty, and the pursuit of happiness" is more than a phrase but a promise that has shaped the American conscience through triumphs and trials…
[VIDEO] MIPS P8700 RISC-V Cores Target Automotive ApplicationsThe rise of RISC-V has been rapid but adoption within safety and security critical spaces requires implementations that can meet requirements like ISO 26262 and…
RISC-V 2024: A Year of Global Growth and InnovationAs 2024 comes to a close, it’s clear that this has been a transformative year for RISC-V. From achieving industry firsts to driving innovation across…
S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPCS2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC December 19, 2024 – S2C, a global leader in FPGA-based prototyping solutions,…
[VIDEO] Why the ESP32 C6 DevKit is Perfect for RISC-V LearningIn this episode of Product of the Week, Robin Mitchell introduces the ESP32 C6 Dev Kit, a powerful single-board microcontroller platform featuring the latest ESP32…
Longnail: Hardware Synthesis of CoreDSL Custom Instructions for MCU- and Application-Class CoresTammo Mürmann has just commenced his PhD studies at the Technical University of Darmstadt as part of the Embedded Systems and Applications Group (ESA). During…
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Xuantie RISC-V TEE solution for MCUAuthor: Lijie Mao 1. Overview TEE (Trusted Execution Enviroment) has been the most widely used method for device security protection. In this article, we will…
RISC-V RV32I RTL Verification using UVM | Maven Silicon BlogBy: Putta Satish, Principal Engineer, Maven Silicon In this demo video, Putta Satish explains the complete RISC-V DV flow: RISC-V RTL pipeline architecture overview, RISC-V…
The First DSA Agile Development on Open Xuantie RISC-V processorAuthor: Prof. Jun Han, Fudan University T-Head made the Xuantie RISC-V series processors open-source and made a series of tools and system software available at…
The RISC-V Mentorship Program – a 2022 Recap, What’s to Come for 2023, and How to ApplyThroughout 2022, the RISC-V community blossomed into a thriving global ecosystem spanning more than 80 countries and 2,500+ members. During this time students and young…
Support for Microchip’s RISC-V Platforms in Antmicro’s Open-Source Renode Framework and BeyondAntmicro, our Mi-V ecosystem partner, has been cooperating with Microchip for many years now, enabling our Mi-V ecosystem with its simulation solutions. Both companies are…
RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Welcome to 2023! I’m so excited for the possibilities of the new year for the RISC-V ecosystem. Ten billion RISC-V cores have been shipped, and…
RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Welcome to 2023! I’m so excited for the possibilities of the new year for the RISC-V ecosystem. Ten billion RISC-V cores have been shipped, and…
Run 32-bit applications on 64-bit Linux kernel | LIU Zhiwei, GUO Ren| T-Head Division of Alibaba Cloud1. Introduction Many architectures support run 32-bit applications on 64-bit processors. On x86, in order to achieve running 16-bit or 32-bit applications in long mode,…
SpacemiT Makes Important Breakthroughs in RISC-V High-Performance Cores | SpacemiTWe’re excited to share some recent progress in the development of our first-generation RISC-V fusion computing processor core - the X100. X100 has already made…
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFiveLate last year, StarFive Technology released “StarFive Dubhe Linux Software Development Kit (SDK)”, which is based on the Yocto Project. It provides a flexible toolset…
How to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba CloudIntroduction T-Head has recently introduced a high-performance SoC prototyping, i.e. TH1520, which is built on the Wujian600 chip development platform. With a quad-core XuanTie C910…
XuanTie C908 Accelerates AI with Software and Hardware FusionAuthor: Shao Wengan 1. Introduction XuanTie C908 is the latest RISC-V processor released by T-Head Semiconductor, It has a frequency of up to 2 GHz.…
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Xuantie RISC-V TEE solution for MCUAuthor: Lijie Mao 1. Overview TEE (Trusted Execution Enviroment) has been the most widely used method for device security protection. In this article, we will…
RISC-V RV32I RTL Verification using UVM | Maven Silicon BlogBy: Putta Satish, Principal Engineer, Maven Silicon In this demo video, Putta Satish explains the complete RISC-V DV flow: RISC-V RTL pipeline architecture overview, RISC-V…
The First DSA Agile Development on Open Xuantie RISC-V processorAuthor: Prof. Jun Han, Fudan University T-Head made the Xuantie RISC-V series processors open-source and made a series of tools and system software available at…
The RISC-V Mentorship Program – a 2022 Recap, What’s to Come for 2023, and How to ApplyThroughout 2022, the RISC-V community blossomed into a thriving global ecosystem spanning more than 80 countries and 2,500+ members. During this time students and young…
Support for Microchip’s RISC-V Platforms in Antmicro’s Open-Source Renode Framework and BeyondAntmicro, our Mi-V ecosystem partner, has been cooperating with Microchip for many years now, enabling our Mi-V ecosystem with its simulation solutions. Both companies are…
RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Welcome to 2023! I’m so excited for the possibilities of the new year for the RISC-V ecosystem. Ten billion RISC-V cores have been shipped, and…
RISC-V Celebrates Momentum of 2022 and Accelerating Adoption in 2023Welcome to 2023! I’m so excited for the possibilities of the new year for the RISC-V ecosystem. Ten billion RISC-V cores have been shipped, and…
Run 32-bit applications on 64-bit Linux kernel | LIU Zhiwei, GUO Ren| T-Head Division of Alibaba Cloud1. Introduction Many architectures support run 32-bit applications on 64-bit processors. On x86, in order to achieve running 16-bit or 32-bit applications in long mode,…
SpacemiT Makes Important Breakthroughs in RISC-V High-Performance Cores | SpacemiTWe’re excited to share some recent progress in the development of our first-generation RISC-V fusion computing processor core - the X100. X100 has already made…
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development | StarFiveLate last year, StarFive Technology released “StarFive Dubhe Linux Software Development Kit (SDK)”, which is based on the Yocto Project. It provides a flexible toolset…
How to Deploy a Neural Network on TH1520 | Wenmeng Zhang, Alibaba CloudIntroduction T-Head has recently introduced a high-performance SoC prototyping, i.e. TH1520, which is built on the Wujian600 chip development platform. With a quad-core XuanTie C910…
XuanTie C908 Accelerates AI with Software and Hardware FusionAuthor: Shao Wengan 1. Introduction XuanTie C908 is the latest RISC-V processor released by T-Head Semiconductor, It has a frequency of up to 2 GHz.…
Synopsys RISC-V ARC-V processor IP gets Lauterbach debug and traceLauterbach has extended their industry leading TRACE32® debug and trace tools to include support for Synopsys’ RISC-V instruction set based ARC-V™ processor IP, which includes…
Introducing fast RISC-V interrupts support in Renode for real time applicationsReal time applications such as space or automotive where instant autonomous decision making is crucial require configurable standardized interrupt controllers. There are many well-known examples…
KVM expansion card utilizes RISC-V CPU architecture for enhanced remote PC management — Sipeed NanoKVM-PCIe now available for pre-order starting at $40Those looking for PC management solutions like KVMs, particularly in the server space, may be interested to hear of Sipeed's new KVM expansion card, which…
RISC-V Summit to Feature, AI, Auto, RTOS and Many More Key TopicsThe RISC-V Summit, North America will take place October 22-23, 2024 at the Santa Clara Convention Center in Santa Clara, California. According to RISC-V International, the organization…
[VIDEO] An Open-Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade StandardsSpeaker: Yungang Bao. Deputy Director, Institute of Computing Technology, Chinese Academy of Sciences. Chief Scientist, Beijing Institute of Open Source Chip. It is widely recognized…
[VIDEO] Accelerate your adoption of RISC-V with CORE-V-VERIFCORE-V-VERIF is an open-source project supported by the OpenHW Group. Its goal is to provide an open-source environment and work-flow that can be deployed onto…
TetraMem Integrates Energy-Efficient In-Memory Computing with Andes RISC-V Vector ProcessorBy Wenbo Yin, Vice President of IC Design, TetraMem Inc. Introduction The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications…
Rivos Selects Andes NX45 for Control Functions in Upcoming High-Performance RISC-V SoCNX45 Becomes the Only RISC-V Core to Pass Rivos’ Rigorous Verification Process After Extensive Evaluation of Leading RISC-V Cores San Jose, CA – Sep. 11, 2024 —…
Andes Technology is Expanding RISC-V’s Horizons in High-Performance Computing ApplicationsBy: Dr. Charlie Su, President and CTO, Andes Technology Corp. At Andes Technology, we are excited to share some of our latest advancements and insights into…
[VIDEO] Accelerating RISC-V testbench development with open source RISC-V RTL and emulationToday’s shorter product time to market makes silicon verification runway shorter. Tenstorrent is working on CPUs based on RISC-V architecture for many AI applications. Since…
[VIDEO] A Holistic Approach to RISC-V Processor VerificationProcessors using the open standard RISC-V instruction set architecture (ISA) are becoming more and more common, with an estimated 30% of SoCs designed in 2023…
[VIDEO] The Future of ComputePatrick Little, SiFive Chairman, President and CEO talks about how RISC-V is shaping the future of compute, how SiFive is gaining momentum from applications from…