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Raspberry Pi Launches New RP2350 MCU and Pico 2 Dev Board with RISC-V Support
Akeana exits stealth mode with comprehensive RISC-V processor portfolio, challenging the semiconductor industry status quoSpacemiT Key Stone K1 AI CPU has been adapted to the Fedora[VIDEO] Synopsys & TASKING RISC-V Solutions for Safety & Security Critical Automotive Appsdeepin 23丨RISC-V New Era Leading Desktop Operating System Innovation
More than 1,300 Attendees Expected at RISC-V Summit China Next Week[VIDEO] Raspberry Pi RP2350 – New Microcontroller Chip with Arm CPUs and RISC-V CPUs 🤯Raspberry Pi launches its first RISC-V multicore chip
Microchip, and O.C.E. Technology deliver high-reliability RTOS for Polarfire® SoC FPGA space applications
Raspberry Pi Launch New RP2350 Microcontroller and Pico 2 Development Board with RISC-V SupportRISC-V 中国峰会议程初版已在官网公布，8月12日形成最终版
Building RISC-V systems on the secure seL4 microkernel in Renode – Antmicro
When 32 bits isn't enough — Porting Zephyr to RISCV64
RISC-V Global Forum – It's a wrap!
RISC-V Global Forum: Initiate. Innovate. Impact.
OpenHW open source CORE-V processor IP: a RISC-V story that leads with verification
Unlocking JavaScript: V8-RISCV Open Sourced
RISC-V Training Partners Bring professional learning to the worldwide community!Welcoming RISC-V International Board MembersRISC-V Global Forum: Technology. Opportunity. Community.seL4 is verified on RISC-V!
Building RISC-V systems on the secure seL4 microkernel in Renode – AntmicroWhen 32 bits isn't enough — Porting Zephyr to RISCV64RISC-V Global Forum – It's a wrap!RISC-V Global Forum: Initiate. Innovate. Impact.OpenHW open source CORE-V processor IP: a RISC-V story that leads with verificationUnlocking JavaScript: V8-RISCV Open SourcedRISC-V Training Partners Bring professional learning to the worldwide community!Welcoming RISC-V International Board MembersRISC-V Global Forum: Technology. Opportunity. Community.seL4 is verified on RISC-V!
RISC-V adoption will be accelerated by AI, according to new Omdia researchGlobal and China Automotive RISC-V Chips Research Report 2024: Market Gains Momentum as Industry Trends Toward Customization and High-Performance Applications – ResearchAndMarkets.comEsperanto Technologies and Rapidus Partner to Enable More Energy-Efficient Designs for the Coming “Post GPU Era”Benchmarking The First RISC-V Cloud Server: Scaleway EM-RV1 Performance
New Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based ApplicationsFrontgrade Gaisler Leads the Way in RISC-V Processor Development for Space ApplicationsCustom RISC-V cores for GPS augmentationMindgrove Brings First Indigenously-Designed RISC-V MCU to IndiaNew Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based ApplicationsThe Rise of RISC-V and ISO 26262 ComplianceX- Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ – a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor CoreRadiation-Tolerant RISC-V FPGA for Linux in space
Raspberry Pi Launches New RP2350 MCU and Pico 2 Dev Board with RISC-V SupportStarting with the release of Raspberry Pi Model B in 2012, Raspberry Pi has a history of innovation with a strong focus on user experience.…
Akeana exits stealth mode with comprehensive RISC-V processor portfolio, challenging the semiconductor industry status quoAkeana™, the company committed to driving dramatic change in semiconductor IP innovation and performance, has announced its official company launch approximately three years after its…
SpacemiT Key Stone K1 AI CPU has been adapted to the FedoraSpacemiT Key Stone K1 AI CPU has been adapted to the Fedora operating system successfully. With the Fedora operating system successfully running on the MUSE…
[VIDEO] Synopsys & TASKING RISC-V Solutions for Safety & Security Critical Automotive AppsLearn how designers benefit from the combination of TASKING's VX Toolset for RISC-V and Synopsys ARC-V™ IP, by gaining access to tools to develop safe,…
deepin 23丨RISC-V New Era Leading Desktop Operating System InnovationAcademician Ni Guangnan of the Chinese Academy of Engineering has stated that the RISC-V architecture, due to its openness and flexibility, has become one of…
More than 1,300 Attendees Expected at RISC-V Summit China Next WeekCheck out all the impressive talks and co-located events Next week, from August 21-23, more than 1,300 attendees will gather at the Huanglong Hotel in…
[VIDEO] Raspberry Pi RP2350 – New Microcontroller Chip with Arm CPUs and RISC-V CPUs 🤯The Raspberry Pi people have released a new microcontroller board the Raspberry Pi Pico 2. However the star of the show is the new microcontroller…
Raspberry Pi launches its first RISC-V multicore chipRaspberry Pi has stepped up its chip development with a quad core microcontroller with two ARM Cortex-M33 cores and two in-house RISC-V cores. The $5…
Microchip, and O.C.E. Technology deliver high-reliability RTOS for Polarfire® SoC FPGA space applicationsBy: Barry Kavanagh, Chief Executive Officer, O.C.E. Technology Ltd. Polarfire® SoC FPGA RISC-V space applications can now take advantage of an RTOS compliant to ESA…
Raspberry Pi Launch New RP2350 Microcontroller and Pico 2 Development Board with RISC-V SupportRaspberry Pi is one of the most recognisable brands of single board computers, created as an affordable way to promote the teaching of computer science…
RISC-V 中国峰会议程初版已在官网公布，8月12日形成最终版经过 2024 RISC-V 中国峰会程序委员会两轮投稿评审，2024 RISC-V 中国峰会的演讲议程已经初步完成，并在中国峰会的官网公布： https://riscv-summit-china.com/agenda/ 本次峰会共接收了超过120个演讲、30篇POSTER投稿；超过15场同期活动将在8月19-25日同步进行。预计会有超过百家企业、研究机构、高校及开源社区的开发者在峰会和同期活动会场上分享交流 RISC-V 领域的最新成果。 请注意目前的议程并未最终版本，演讲信息是根据2024年6月22日及7月18日两轮投稿信息整理，部分演讲的标题和演讲者信息会在8月10-12日左右进行更新完善，请以 RISC-V 中国峰会官网更新为准。 媒体联系（中文）： 张女士 zhangyuxi@iscas.ac.cn 媒体联系（英文）：china@riscv.org
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Building RISC-V systems on the secure seL4 microkernel in Renode – AntmicroThis content originally published on the Antmicro Blog The increasing complexity of IoT applications comes with a bigger risk of potential cyber-attacks that can target multiple…
When 32 bits isn't enough — Porting Zephyr to RISCV64Conventional wisdom says you should normally apply small microcontrollers to dedicated applications with constrained resources. 8-bit microcontrollers with a few kilobytes of memory are still…
RISC-V Global Forum – It's a wrap!RISC-V Global Forum 2020, our first virtual event that spanned 18 hours! To find session presentations, go to the schedule of the session. If the…
RISC-V Global Forum: Initiate. Innovate. Impact.Click to register. There is an increase in demand for processors that will address concerns related to security, graphics, high-performance computing, and artificial intelligence.…
OpenHW open source CORE-V processor IP: a RISC-V story that leads with verificationFig. 1. OpenHW: CORE-V processor features for CVE4 & CVA6 To help and support SoC design teams looking to adopt CORE-V, the OpenHW Group has…
Unlocking JavaScript: V8-RISCV Open SourcedWhy V8 While the software ecosystem of RISC-V has evolved rapidly in the last decade, an important domain of applications, web applications, is still missing…
RISC-V Training Partners Bring professional learning to the worldwide community!When we think of learning at RISC-V International, it's a passion and drive to provide opportunities to the community to have access to the materials…
Welcoming RISC-V International Board MembersRISC-V International Welcomes New Board Members: Leading Growth Through Technology, Opportunity, and Community By Calista Redmond, August 3, 2020 The RISC-V community has grown and…
RISC-V Global Forum: Technology. Opportunity. Community.The schedule for RISC-V Global Forum is live! We have an exciting lineup of keynotes, session presentations, lightning talks, ask the experts, sponsor exhibits, and…
seL4 is verified on RISC-V!The most exciting aspect of an open ISA with open-source hardware implementations is the prospect of verifying the implementations. This sounds like a big ask…
No recent posts listed
Building RISC-V systems on the secure seL4 microkernel in Renode – AntmicroThis content originally published on the Antmicro Blog The increasing complexity of IoT applications comes with a bigger risk of potential cyber-attacks that can target multiple…
When 32 bits isn't enough — Porting Zephyr to RISCV64Conventional wisdom says you should normally apply small microcontrollers to dedicated applications with constrained resources. 8-bit microcontrollers with a few kilobytes of memory are still…
RISC-V Global Forum – It's a wrap!RISC-V Global Forum 2020, our first virtual event that spanned 18 hours! To find session presentations, go to the schedule of the session. If the…
RISC-V Global Forum: Initiate. Innovate. Impact.Click to register. There is an increase in demand for processors that will address concerns related to security, graphics, high-performance computing, and artificial intelligence.…
OpenHW open source CORE-V processor IP: a RISC-V story that leads with verificationFig. 1. OpenHW: CORE-V processor features for CVE4 & CVA6 To help and support SoC design teams looking to adopt CORE-V, the OpenHW Group has…
Unlocking JavaScript: V8-RISCV Open SourcedWhy V8 While the software ecosystem of RISC-V has evolved rapidly in the last decade, an important domain of applications, web applications, is still missing…
RISC-V Training Partners Bring professional learning to the worldwide community!When we think of learning at RISC-V International, it's a passion and drive to provide opportunities to the community to have access to the materials…
Welcoming RISC-V International Board MembersRISC-V International Welcomes New Board Members: Leading Growth Through Technology, Opportunity, and Community By Calista Redmond, August 3, 2020 The RISC-V community has grown and…
RISC-V Global Forum: Technology. Opportunity. Community.The schedule for RISC-V Global Forum is live! We have an exciting lineup of keynotes, session presentations, lightning talks, ask the experts, sponsor exhibits, and…
seL4 is verified on RISC-V!The most exciting aspect of an open ISA with open-source hardware implementations is the prospect of verifying the implementations. This sounds like a big ask…
RISC-V adoption will be accelerated by AI, according to new Omdia researchLONDON, May 16, 2024 /PRNewswire/ -- RISC-V processors will account for almost a quarter of the global market by 2030, according to new research by Omdia. The open-standard instruction set architecture…
Global and China Automotive RISC-V Chips Research Report 2024: Market Gains Momentum as Industry Trends Toward Customization and High-Performance Applications – ResearchAndMarkets.comDUBLIN--(BUSINESS WIRE)--The "Global and China Automotive RISC-V Chip Industry Research Report, 2024" report has been added to ResearchAndMarkets.com's offering. The automotive industry is witnessing a significant shift towards the…
Esperanto Technologies and Rapidus Partner to Enable More Energy-Efficient Designs for the Coming “Post GPU Era”MOUNTAIN VIEW, Calif., May 15, 2024 – Esperanto Technologies™, the leading developer of high-performance, energy-efficient artificial intelligence (AI) and high-performance computing (HPC) solutions based on the…
Benchmarking The First RISC-V Cloud Server: Scaleway EM-RV1 PerformanceScaleway by way of their Scaleway Labs group recently launched the Elastic Metal RV1 (EM-RV1) as the world's first RISC-V servers available in the cloud.…
New Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based ApplicationsAGL’s latest UCB release advances SDV development and takes a software-first approach with support for AWS Graviton and Toyota Embedded Flutter Automotive Grade Linux (AGL), a…
Frontgrade Gaisler Leads the Way in RISC-V Processor Development for Space ApplicationsGOTHENBURG, Sweden--(BUSINESS WIRE)--Under a contract with the European Space Agency (ESA), Frontgrade Gaisler is designing a new RISC-V processor tailored to meet the requirements of…
Custom RISC-V cores for GPS augmentationMerlinTPS is to use a RISC-V processor core from Bluespec for satellite navigation augmentation and backup technology. The deal marks the start of the next…
Mindgrove Brings First Indigenously-Designed RISC-V MCU to IndiaThe new RISC-V-based SoC is the first microprocessor owned, designed, and marketed entirely from India to the open market. While semiconductor technology is a matter…
New Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based ApplicationsSAN FRANCISCO, May 9, 2024 /PRNewswire/ -- Automotive Grade Linux (AGL), a collaborative cross-industry effort developing an open source platform for all Software-Defined Vehicles (SDVs), has announced the latest…
The Rise of RISC-V and ISO 26262 ComplianceRISC-V technology is beginning its inroads into automotive electrical/electronic (EE) architecture design. Four major trends are driving this evolution: the surge in electric vehicles (EVs), advances…
X- Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ – a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor CoreSAN DIEGO, May 1, 2024 /PRNewswire/ -- X-Silicon Inc (XSI), a San Diego-based startup, announced today their new NanoTile open-standard low-power "C-GPU" architecture that infuses GPU acceleration into a RISC-V…
Radiation-Tolerant RISC-V FPGA for Linux in spaceMicrochip Technology has launched a radiation tolerant version of its PolarFire FPGA with a RISC-V processor sub-system that can run the Linux operating system. The…