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1.8 Billion Heterogenous AI Chipsets by 2030, 129 Million RISC-V AI Shipments by 2030 and 36 Other Transformative Technology Stats You Need to KnowAndes and MachineWare Collaborate on Early RISC-V Software Development for AndesCore™ AX45MPV
Soccer, Chips, RISC-V and Brazil
Tenstorrent Scores Big Design Win With Japan’s LTSC To Enable Leading-Edge 2nm AI Accelerator
[PODCAST] Leading the RISC-V Revolution, SiFive Aims to Take the Computing Industry ThroneTenstorrent RISC-V and Chiplet Technology Selected to Build the Future of AI in Japan
Porting and Optimizing Android ART on XuanTie C910
Developing and testing heterogeneous space-grade systems with Renode
Ashling’s RiscFree™ SDK Toolchain now available with support for MIPS RISC-V ISA compatible P8700 and I8500 CPUs
Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoCAndes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoC
Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnect[VIDEO] RISC-V Video Editing & 500th Episode
Automated Kernel Testing on RISC-V Hardware
Ashling’s RiscFree™ SDK Now Supports RISC-V® Processor Cores from CASTChipmakers, Researchers, and Hobbyists Show Off the Many Faces of RISC-V
OpenHW Group Appoints Florian ‘Flo’ Wohlrab as New CEO to Spearhead Open-Source Ecosystem AdvancementAccelerating RISC-V development with network-on-chip IPClaude (AI) Codes a RISC-V Core in TL-Verilog
Nordic Semiconductor proves world-leading processing efficiency with the revolutionary nRF54H20 SoCNew RISC-V Market Report Will Provide 5-Year Growth Projections for Semiconductor Devices and Insights on the Enabling EcosystemNew RISC-V Market Report Will Provide 5-Year Growth Projections for Semiconductor Devices and Insights on the Enabling Ecosystem
[VIDEO] Pointers in RISC-V Assembly
1.8 Billion Heterogenous AI Chipsets by 2030, 129 Million RISC-V AI Shipments by 2030 and 36 Other Transformative Technology Stats You Need to KnowThe technology community – both innovators and implementers – is at a critical juncture in 2024. Global market pressures are starting to ease, but persistent…
Andes and MachineWare Collaborate on Early RISC-V Software Development for AndesCore™ AX45MPVAachen, Germany and Hsinchu, Taiwan, February 27th 2024 MachineWare GmbH and Andes Technology (TWSE:6533), a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding…
Soccer, Chips, RISC-V and BrazilBrazil Joins RISC-V International as Premier Member In the realm of global sports, soccer stands unparalleled, symbolizing not just a game but a tapestry of…
Tenstorrent Scores Big Design Win With Japan’s LTSC To Enable Leading-Edge 2nm AI AcceleratorJapan’s Leading-edge Semiconductor Technology Center, or LSTC, was established in late 2022 and is tasked with advancing the country’s research and innovation in areas such…
[PODCAST] Leading the RISC-V Revolution, SiFive Aims to Take the Computing Industry ThroneSiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights…
Tenstorrent RISC-V and Chiplet Technology Selected to Build the Future of AI in JapanSANTA CLARA, Calif., Feb. 27, 2024 /PRNewswire/ -- Tenstorrent is pleased to announce a multi-tiered partnership deal with Japan's Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent's world-class RISC-V…
Porting and Optimizing Android ART on XuanTie C910By Lifang Xia Over the past three years, our team has undertaken the substantial task of porting Android 10 and Android 12 to the XuanTie…
Developing and testing heterogeneous space-grade systems with RenodeWhile landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft…
Ashling’s RiscFree™ SDK Toolchain now available with support for MIPS RISC-V ISA compatible P8700 and I8500 CPUsFeb 23, 2023 SILICON VALLEY, CA, USA. Ashling and MIPS announced today that Ashling’s RiscFree SDK is now available with full support for MIPS RISC-V…
Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoCFeb 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade…
Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoCFeb 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade…
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Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnectBarcelona, Spain – 3 October, 2023 -- There is an ever-increasing demand for more powerful chip designs for advanced applications, such as AI and ML, that require many…
[VIDEO] RISC-V Video Editing & 500th EpisodeKdenlive video editing on a Lichee Pi 4A single board computer. Sipeed made it work! This is also the 500th ExplainingComputers video and a celebration…
Automated Kernel Testing on RISC-V HardwareAt Codethink we have an increasing interest in the RISC-V architecture, and have, in past years, written several articles related to it, on subjects ranging…
Ashling’s RiscFree™ SDK Now Supports RISC-V® Processor Cores from CASTCAST BA51 and BA53 IP core customers can now use Ashling’s RiscFree™ SDK to develop and debug systems that use these RISC-V processors Woodcliff Lake,…
Chipmakers, Researchers, and Hobbyists Show Off the Many Faces of RISC-VIn this roundup, we review the ways RISC-V is making its mark in the computing world—from small-scale gaming projects to large-scale corporate initiatives. While the…
OpenHW Group Appoints Florian ‘Flo’ Wohlrab as New CEO to Spearhead Open-Source Ecosystem AdvancementOTTAWA, Canada – September 20, 2023 - OpenHW Group, a global consortium driven by its members and contributors, is pleased to announce the appointment of Florian…
Accelerating RISC-V development with network-on-chip IPIn the world of system-on-chip (SoC) devices, architects encounter many options when configuring the processor subsystem. Choices range from single processor cores to clusters to…
Claude (AI) Codes a RISC-V Core in TL-VerilogTL-Verilog has the promise to help humans and LLMs collaborate effectively and safely on digital circuits. But first, we need to teach LLMs TL-Verilog. I…
Nordic Semiconductor proves world-leading processing efficiency with the revolutionary nRF54H20 SoCNordic Semiconductor today announces that its nRF54H20 multiprotocol System-on-Chip (SoC)—the first in the nRF54H Series—has proven its world-leading processing efficiency, along with superior processing performance.…
New RISC-V Market Report Will Provide 5-Year Growth Projections for Semiconductor Devices and Insights on the Enabling EcosystemSAN JOSE, CA / ACCESSWIRE / September 19, 2023 / The SHD Group, a leading strategic marketing and business development firm, today announced its plans to…
New RISC-V Market Report Will Provide 5-Year Growth Projections for Semiconductor Devices and Insights on the Enabling EcosystemSAN JOSE, CA / ACCESSWIRE / September 19, 2023 / The SHD Group, a leading strategic marketing and business development firm, today announced its plans to…
[VIDEO] Pointers in RISC-V AssemblyIn this video, we translate a C program to RISC-V assembly to demonstrate how pointers are declared and referenced. We also use base instructions to…