Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

No recent posts listed
RISC-V Summit Buzz – Launchpad Showcase Highlights Smaller Company Innovation

One of the goals of the recent RISC-V Summit was to demonstrate that the RISC-V movement is real – major programs by large organizations committing…

Five years of SERVing

Author: Olof Kindgren Making your own RISC-V CPU is a terrible idea. I have said that many times before. There are already a million RISC-V…

Open-Source Chip Design Takes Hold in Silicon Valley

A decade-old standard for designing semiconductors called RISC-V is gaining traction as technology companies look at making their own high-performance and specialized chips for artificial…

Sameer Wasson’s Vision for MIPS/RISC-V

MIPS today is RISC-V. Unique to MIPS is that it has figured out a recipe, protecting the strengths of MIPS ISA while leveraging RISC-V to…

Sipeed Takes RISC-V Into the Gaming Arena with the Nintendo Switch-Like Lichee Pocket 4A

Embedded hardware specialist Sipeed has unveiled a new carrier for its high-performance Lichee Module 4A (LM4A) RISC-V system-on-module (SOM), and this one's a little unusual:…

The Top 10 RISC-V Milestones & Highlights from 2023

Looking back at 2023, there are many different ways to measure progress and success. You could point to the growing adoption of RISC-V—which is in…

BSC presents Sargantana, the first open-source chips designed in Spain

The Barcelona Supercomputing Center – Centro Nacional de Supercomputación (BSC-CNS) presented the new Sargantana chip, the third generation of open source processors designed entirely at…

RISC-V and Arteris: Shaping the Future of Chip Design

Overview RISC-V is revolutionizing the semiconductor world with its promise of freedom to innovate and enable specialization, fueling the golden age of semiconductors. The world…

Developing and testing with Renode in heterogeneous, multi-node automotive use cases

Automotive engineering in the past 30 years has been transformed by the growing capabilities of microprocessors, enabling their use in a wide range of the…

Solving bus and software deadlock problems in complex SoCs

By: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager Intermittent bus and software deadlocks are amongst the toughest problems for development teams…

Andes Awards Imperas 2023 Partner of the Year

Oxford United Kingdom, Dec. 12, 2023 (GLOBE NEWSWIRE) -- Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Andes Technology Corporation, a leading…

Reviewing the 2023 RISC-V Summit

The 2024 RISC-V Summit is already in the planning stages, but if you missed attending the 2023 version, then you're in luck. The keynote and technical…

No recent posts listed
No recent posts listed
No recent posts listed
RiscFree C/C++ support for Lattice RISC_V soft IP cores

Ashling has added support for RISC-V soft IP cores from Lattice Semiconductor to its RiscFree development tool. The RiscFree software development kit (SDK) includes an…

Semidynamics announces, 4-way, Atrevido 423 RISC-V core

Semidynamics has launched the next member of its Atrevido family of 64-bit cores. The Atrevido 423 h... Read more at: https://www.bisinfotech.com/semidynamics-announces-4-way-atrevido-423-risc-v-core/

RISC-V Fast-Forwards, Breaks Ground for Auto Innovations

The SiFive RISC-V Automotive CPU IP continues to advance to address and enable automotive applications like infotainment, connectivity and advanced driver-assistance systems. Yet without the…

Want Tailormade Screamingly-High-Performance RISC-V64 IP?

Soooo… you’ve decided you’re going to create a system-on-chip (SoC) device of such awesomeness that it will leave your competitors gnashing their teeth and rending…

Fully customisable 4-way RISC-V core for big data

Semidynamics in Spain has developed a customisable 4-way RISC-V 64bit core for data centre chips. The Atrevido 423 RISC-V core has a wide 4-way pipeline…

ANDLA DEBUTS FOR AI ACCELERATION

Andes’ new deep-learning accelerator addresses convolutional neural networks in edge applications. Accompanied by vector CPUs, it forms an AI subsystem that can be scaled up…

Making the most of the 60th DAC

I just returned from a week in San Francisco where I attended the 60th Design Automation Conference. It was a typical week at DAC — cold weather in July,…

Polos CH32Vxx 32-bit RISC-V MCU boards starts at $1.99

XPU Labs, a subsidiary of AnalogLamb, has designed three inexpensive “Polos” development boards based on WCH CH32VXX RISC-V microcontrollers with pricing starting at just $1.99. The…

Startups Help RISC-V Reshape Computer Architecture

The RISC-V instruction set architecture (ISA) is one of the most notable contenders to emerge in the ever-evolving realm of computer architecture. Because of its…

RISC-V Fast-Forwards, Breaks Ground for Auto Innovations

The SiFive RISC-V Automotive CPU IP continues to advance to address and enable automotive applications like infotainment, connectivity and advanced driver-assistance systems. Yet without the…

The industry’s first RISC-V IoT security chip, “Towngas Chip”, had sold over 1,000,000 pieces

July 17, 2023 -- Towngas Group officially announced that the sales of the first RISC-V IoT security chip "Towngas Chip" had exceeded 1 million pieces, which…

THIS RISC-V CPU GAMES IN RUST FROM INSIDE THE GAME

has created something truly impressive — a working RISC-V CPU completely contained in a Terraria world. And then for added fun, he wrote the game of…