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EW2026 Render

Production-Ready, Automotive-Grade, AI-Native: RISC-V at Embedded World 2026

Ahead of Embedded World, we explore what our members and co-exhibitors will showcase in Nuremberg, the common threads linking their work, and what this reveals about the embedded landscape in 2026.

Simplifying Sail Simulations and Architectural Compatibility Testing

Greg Sterling from RISC-V International has worked with Carl Perry to create a RISC-V development container to help streamline the process of working with RISC-V…

CAST Provides a Functional Safety RISC-V Processor IP for the Microchip FPGA’s

Build safety-critical automotive, aeronautic, space, and other systems with the Functional Safety RISC-V Processor IP core from CAST and PolarFire FPGAs. By Evan Price, Sales…

Building on a Legacy of Security: Introducing Polar-VPX

SundanceDSP, a leading provider of high-performance FPGA-based solutions, is proud to announce the latest addition to its product lineup: Polar-VPX. This cutting-edge 3U VPX form-factor…

Soft Tiling RISC-V Processor Clusters Speed Design and Reduce Risk

By John Min    John Min is VP of Customer Success at Arteris. He possesses architectural expertise that enables the successful management of design trade-offs…

How NVIDIA Shipped One Billion RISC-V Cores In 2024

At the recent RISC-V North America summit, NVIDIA’s Vice President of Multimedia Architecture, Frans Sijstermans gave his insight into why NVIDIA chose RISC-V as the…

RISC-V HPC excitement at Supercomputing 2024 sets up an unmissable ISC 2025

By: Nick Brown, EPCC High Performance Computing (HPC) is one of the most exciting and challenging fields, solving the world's biggest problems with incredible levels…

RISC-V at Embedded World 2025: Innovation, Networking & Must-See Sessions

The RISC-V Pavilion returns to embedded world for 2025!  Visit us in Hall 5, Stand 5-119, to discover the latest RISC-V technologies and applications and…

TestRIG – Randomized Testing of RISC-V CPUs

TestRIG (Testing with Random Instruction Generation) is a testing framework for RISC-V implementations. The RISC-V community has standardized a formal model of the architecture in…

Accelerating RISC-V development with Tessent UltraSight-V

By: Francisca Tan, Product Management Lead – Tessent Embedded Analytics Siemens’ longstanding and deep engagement with the RISC-V community dates back to the foundation’s early…

Towards an Integrated Matrix Extension: Workload Analysis of CNN Inference with QEMU TCG Plugings

Introduction  Following the gap analysis done in the second half of 2023, the Vector Special Interest Group (SIG-Vector) has been working on specifying instructions to…

RISC-V launches search for new CEO

2024 was a year of accelerating momentum for RISC-V.  Adoption grew across a diverse range of markets, the foundational new RVA23 Profile was ratified, and many new…

Chromium Performance Optimization on XuanTie RISC-V Processors

Yang Li, Alibaba DAMO Academy Chromium, the most widely adopted open-source browser engine, serves as the foundation for numerous mainstream applications, including Chrome, Electron, VSCode,…

Happy 10th Birthday RISC-V!

It is hard to believe, but the RISC-V project is ten years old today! RISC-V at HotChips, Flint Center, Cupertino CA, August 2014 After careful…

RISC-V International and GlobalPlatform Partner to Enhance Security Design of IoT Devices

Industry associations collaborate to drive open source standards that simplify security design for hardware developers and enhance the security of IoT devices and processors May…

RISC-V Foundation Announces Ratification of the Processor Trace Specification

Ratification signifies another breakthrough for the thriving RISC-V ecosystem San Francisco – March 9 2020 – The RISC-V Foundation, a non-profit corporation controlled by its…

METASAT Project Celebrates 18 Months of Innovation: Key Developments in Satellite Technology

July 1st, 2024 – The METASAT Project, a European Commission-funded initiative aimed at transforming satellite technology is pleased to announce significant progress after a year…

Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI application

By Makeljana Shkurti, SES VRULL, a company headquartered in Austria that provides consulting services and outsourced R&D to semiconductor companies, is entering a strategic partnership…

Accelerate RISC-V Verification Using Synopsys Cloud

RISC-V is an emerging choice for semiconductor companies to create highly differentiated products for a wide range of end applications. Both established players and start-up…

RISC-V Summit Europe is Underway with 700+ Attendees Representing 40 Countries

This year’s RISC-V Summit Europe, taking place in Munich, Germany from Monday, June 24 – Friday, June 28, has already welcomed more than 700 attendees…

AI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit International

In recognition of International Women in Engineering Day on June 23, we want to shine the spotlight on some of the outstanding women in the…

RISC-V in Brazil: Leading the Open Compute Era in Latin America

On June 14th, 2024, the Eldorado Research Institute in Campinas, São Paulo, hosted the RISC-V Brazil event. This gathering brought together over 200 professionals, researchers,…

HPC on RISC-V a hot topic at the International Supercomputing Conference, Hamburg

By Nick Brown, Senior Research Fellow at EPCC, University of Edinburgh   May the 13th saw the commencement of the 39th International Supercomputing Conference (ISC)…

My Top 10 Reasons to Attend RISC-V Summit Europe

By Tiffany Sparks, Vice President, Marketing, RISC-V International   Like so many others, I am looking forward to summer travel, and I am certainly excited…

Designing with RISC-V Using ChipInventor

Sunnyvale, June 6th, 2024 Revolutionizing Chip Design with RISC-V ChipInventor has successfully been used to design and tape out RISC-V cores, transforming ideas into FPGA…

RISC-V Summit China 2024: Details Now Available on Call for Proposals and Sponsorships

RISC-V Summit China 2024: Details Now Available on Call forProposals and Sponsorships The 4th RISC-V Summit China will be held from August 19 to 25,…

Seeking Sponsors for RISC-V Day Tokyo 2024!

Join us at RISC-V Day Tokyo 2024 on August 1 at the University of Tokyo's Ito International Academic Research Center. We’re looking for sponsors to…

UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.

Author: Gerard Vink INTRODUCTION TASKING, a leading provider of innovative compiler solutions for the automotive functional safety sector, has introduced a compiler toolset for the…

METASAT Project Celebrates 18 Months of Innovation: Key Developments in Satellite Technology

July 1st, 2024 – The METASAT Project, a European Commission-funded initiative aimed at transforming satellite technology is pleased to announce significant progress after a year…

Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI application

By Makeljana Shkurti, SES VRULL, a company headquartered in Austria that provides consulting services and outsourced R&D to semiconductor companies, is entering a strategic partnership…

Accelerate RISC-V Verification Using Synopsys Cloud

RISC-V is an emerging choice for semiconductor companies to create highly differentiated products for a wide range of end applications. Both established players and start-up…

RISC-V Summit Europe is Underway with 700+ Attendees Representing 40 Countries

This year’s RISC-V Summit Europe, taking place in Munich, Germany from Monday, June 24 – Friday, June 28, has already welcomed more than 700 attendees…

AI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit International

In recognition of International Women in Engineering Day on June 23, we want to shine the spotlight on some of the outstanding women in the…

RISC-V in Brazil: Leading the Open Compute Era in Latin America

On June 14th, 2024, the Eldorado Research Institute in Campinas, São Paulo, hosted the RISC-V Brazil event. This gathering brought together over 200 professionals, researchers,…

HPC on RISC-V a hot topic at the International Supercomputing Conference, Hamburg

By Nick Brown, Senior Research Fellow at EPCC, University of Edinburgh   May the 13th saw the commencement of the 39th International Supercomputing Conference (ISC)…

My Top 10 Reasons to Attend RISC-V Summit Europe

By Tiffany Sparks, Vice President, Marketing, RISC-V International   Like so many others, I am looking forward to summer travel, and I am certainly excited…

Designing with RISC-V Using ChipInventor

Sunnyvale, June 6th, 2024 Revolutionizing Chip Design with RISC-V ChipInventor has successfully been used to design and tape out RISC-V cores, transforming ideas into FPGA…

RISC-V Summit China 2024: Details Now Available on Call for Proposals and Sponsorships

RISC-V Summit China 2024: Details Now Available on Call forProposals and Sponsorships The 4th RISC-V Summit China will be held from August 19 to 25,…

Seeking Sponsors for RISC-V Day Tokyo 2024!

Join us at RISC-V Day Tokyo 2024 on August 1 at the University of Tokyo's Ito International Academic Research Center. We’re looking for sponsors to…

UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.

Author: Gerard Vink INTRODUCTION TASKING, a leading provider of innovative compiler solutions for the automotive functional safety sector, has introduced a compiler toolset for the…