No recent posts listed
Working With the Microchip PolarFire® SoC FPGA Using SEGGER Development Tools and Debug Probes
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography
Yocto Project Welcomes RISC-V International as New Platinum Member, Expands Global Ecosystem and Leads with Cyber Resilience Act Preparedness
OniO raises €5m to ramp up ultra low power RISC-V microcontroller production
Indian RISC-V Startup Slashes Design Time to Minutes
The Rise of RISC-V
MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and Automotive
Former Intel engineers form AheadComputing to break CPU performance limits with RISC-V design
Embedded Evolution: A New RISC-V CEO & AI-Powered Platforms
SiFive and Red Hat Collaborate on Enterprise Linux for RISC-V
5 RISC-V Single-Board Computers Tested : Performance, Benchmarks, Features and Insights
AMD’s Kernel Compute Driver “AMDKFD” Can Now Be Enabled On RISC-V
Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry
14 Years of RISC-V: A Journey of Innovation and Firsts
Recent developments in the Zephyr port for RISC-V
RISC-V Impact on Technology and Innovation
RISC-V for All!
Exploring the Top Highlights of the RISC-V Booth at embedded world 2024
Celebrating Women in the Global RISC-V Community
Introducing SoM1-SOC: The Most Powerful SoM Based on PolarFire® SoC FPGAIntegrated IP Core Generation Workflow for Microchip SoC FPGAs With MathWorks®
Meeting RISC-V Demands: S2C’s Tailored OfferingsVisit RISC-V at embedded world 2024!
RISC-V Technical Leadership Update
Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry14 Years of RISC-V: A Journey of Innovation and FirstsRecent developments in the Zephyr port for RISC-VRISC-V Impact on Technology and InnovationRISC-V for All!Exploring the Top Highlights of the RISC-V Booth at embedded world 2024Celebrating Women in the Global RISC-V CommunityIntroducing SoM1-SOC: The Most Powerful SoM Based on PolarFire® SoC FPGAIntegrated IP Core Generation Workflow for Microchip SoC FPGAs With MathWorks®Meeting RISC-V Demands: S2C’s Tailored OfferingsVisit RISC-V at embedded world 2024!RISC-V Technical Leadership Update
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI Workloads
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI Workloads
Andes teams on FPGA prototyping for RISC-V development
S2C and Andes Technology Collaborating to Accelerate Advanced RISC-V SoC Development
Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
RISC-V RVA23—A Major Milestone
Testing Infineon’s virtual automotive RISC-V chip
[VIDEO] OpenHW Foundation RISC-V Cores: Empowering the Hardware Revolution for SDV
Canonical Adds the Orange Pi RV2 to Its List of Officially-Supported Ubuntu-Capable RISC-V Boards
Podcast EP282: An Overview of Andes Focus on RISC-V and the Upcoming RISC-V CON
Ubuntu developer images now available for OrangePi RV2: a low-cost RISC-V SBC
A 32-bit RISC-V processor made using molybdenum disulfide instead of silicon
Working With the Microchip PolarFire® SoC FPGA Using SEGGER Development Tools and Debug ProbesThe PolarFire® SoC family offers the industry's first RISC-V based System-on-Chip Field-Programmable Gate Arrays (SoC FPGAs), delivering a combination of low power consumption, thermal efficiency and…
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based CryptographyProject Snapshot Post-quantum cryptography (PQC) has garnered significant attention across various communities, particularly with the National Institute of Standards and Technology (NIST) advancing to the…
Yocto Project Welcomes RISC-V International as New Platinum Member, Expands Global Ecosystem and Leads with Cyber Resilience Act PreparednessDENVER – Open Source Summit North America – June 23, 2025 – The Yocto Project, an open source collaboration project that helps developers create custom Linux-based systems…
OniO raises €5m to ramp up ultra low power RISC-V microcontroller productionNorwegian chip design OniO has raised €5m to ramp up production of its ultra low power RISC-V microcontroller. ONiO.zero is the first general-purpose microcontroller that…
Indian RISC-V Startup Slashes Design Time to MinutesIndian fabless startup InCore Semiconductors has unveiled its SoC Generator platform, a deterministic automation tool that compresses the time to design a fully functional SoC…
The Rise of RISC-VeeNews Europe Interview with Krste Asanovic about the benefits of RISC-V OpenISA It was in the summer of 2010 that Krste and a group of…
MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and AutomotiveSan Jose, CA & Hyderabad, India- June 12, 2025: Cyient Semiconductors Private Limited, a fast-growing custom silicon company based in Hyderabad, and MIPS, a global leader…
Former Intel engineers form AheadComputing to break CPU performance limits with RISC-V designWhat just happened? In the heart of Oregon's Silicon Forest, a group of veteran chip architects has traded the security of a tech giant for the…
Embedded Evolution: A New RISC-V CEO & AI-Powered PlatformsIn this episode of Embedded Insiders, we’re joined by RISC-V’s newest CEO, Andrea Gallo, who outlines his vision for the company’s future. From accelerating ecosystem growth…
SiFive and Red Hat Collaborate on Enterprise Linux for RISC-VIn a big announcement for the RISC-V community, SiFive and Red Hat have made public a new collaboration between the two to bring Red Hat…
5 RISC-V Single-Board Computers Tested : Performance, Benchmarks, Features and InsightsWhat if the future of computing wasn’t locked behind proprietary architectures? Imagine a world where developers and hobbyists alike could harness the power of open…
AMD’s Kernel Compute Driver “AMDKFD” Can Now Be Enabled On RISC-VFollowing all of the Linux kernel graphics driver features merged last week for the Linux 6.16 kernel, sent out this morning were the initial batch of fixes to the…
Keynote: Charting the AI-Powered Transformation in the Semiconductor IndustryBy Sivakumar P R, Founder & CEO, Maven Silicon In this keynote, ‘Charting the AI-Powered Transformation in the Semiconductor Industry’ at the 37th International VLSI…
14 Years of RISC-V: A Journey of Innovation and FirstsWhat began as a humble mission to construct a simple, efficient, and adaptable system for research endeavors and educational pursuits at the University of California…
Recent developments in the Zephyr port for RISC-VAs the open source Zephyr RTOS continues to grow in popularity, with most of the leading semiconductor vendors supporting the project as members, the open…
RISC-V Impact on Technology and InnovationBy Calista Redmond, CEO, RISC-V International RISC-V has rapidly emerged as the leading standard Instruction Set Architecture (ISA) in the world of processor design and…
RISC-V for All!What you’ll find in this blog post: Diversity is a driving force of the RISC-V RISC-V Summit Europe Travel Fund RISC-V North America Global Scholarships…
Exploring the Top Highlights of the RISC-V Booth at embedded world 2024embedded world 2024 showed great momentum for RISC-V. Throughout the event, RISC-V International members showcased cutting-edge innovations and forged invaluable connections, expanding the reach of…
Celebrating Women in the Global RISC-V CommunityCollaboration is an essential part of driving innovation forward in the growing RISC-V ecosystem. By promoting inclusivity, we strive to create a welcoming environment where…
Introducing SoM1-SOC: The Most Powerful SoM Based on PolarFire® SoC FPGABy: Mans Ahmadian, Senior Design Engineer at Sundance DSP In this blog post, we will discuss the features, benefits and applications of SoM1-SOC, a powerful…
Integrated IP Core Generation Workflow for Microchip SoC FPGAs With MathWorks®By: Puneet Kumar Learn more about IP Core Generation workflow from MATLAB® R2022A release onwards for PolarFire® SoC FPGA and SmartFusion® 2 family of Microchip FPGAs. Introducing IP Core Generation for…
Meeting RISC-V Demands: S2C’s Tailored OfferingsRISC-V, an open standard instruction set architecture (ISA), has captured the imaginations of engineers and innovators worldwide due to its simplicity and accessibility. This architecture…
Visit RISC-V at embedded world 2024!Step into the world of RISC-V at embedded world 2024 in Nuremberg, Germany, April 9-11! Join us as our community showcases the remarkable impact of open collaboration…
RISC-V Technical Leadership UpdateBy: Calista Redmond During the past four years RISC-V has undergone tremendous growth and transformation, both as an organization and in our leadership globally to…
No recent posts listed
Keynote: Charting the AI-Powered Transformation in the Semiconductor IndustryBy Sivakumar P R, Founder & CEO, Maven Silicon In this keynote, ‘Charting the AI-Powered Transformation in the Semiconductor Industry’ at the 37th International VLSI…
14 Years of RISC-V: A Journey of Innovation and FirstsWhat began as a humble mission to construct a simple, efficient, and adaptable system for research endeavors and educational pursuits at the University of California…
Recent developments in the Zephyr port for RISC-VAs the open source Zephyr RTOS continues to grow in popularity, with most of the leading semiconductor vendors supporting the project as members, the open…
RISC-V Impact on Technology and InnovationBy Calista Redmond, CEO, RISC-V International RISC-V has rapidly emerged as the leading standard Instruction Set Architecture (ISA) in the world of processor design and…
RISC-V for All!What you’ll find in this blog post: Diversity is a driving force of the RISC-V RISC-V Summit Europe Travel Fund RISC-V North America Global Scholarships…
Exploring the Top Highlights of the RISC-V Booth at embedded world 2024embedded world 2024 showed great momentum for RISC-V. Throughout the event, RISC-V International members showcased cutting-edge innovations and forged invaluable connections, expanding the reach of…
Celebrating Women in the Global RISC-V CommunityCollaboration is an essential part of driving innovation forward in the growing RISC-V ecosystem. By promoting inclusivity, we strive to create a welcoming environment where…
Introducing SoM1-SOC: The Most Powerful SoM Based on PolarFire® SoC FPGABy: Mans Ahmadian, Senior Design Engineer at Sundance DSP In this blog post, we will discuss the features, benefits and applications of SoM1-SOC, a powerful…
Integrated IP Core Generation Workflow for Microchip SoC FPGAs With MathWorks®By: Puneet Kumar Learn more about IP Core Generation workflow from MATLAB® R2022A release onwards for PolarFire® SoC FPGA and SmartFusion® 2 family of Microchip FPGAs. Introducing IP Core Generation for…
Meeting RISC-V Demands: S2C’s Tailored OfferingsRISC-V, an open standard instruction set architecture (ISA), has captured the imaginations of engineers and innovators worldwide due to its simplicity and accessibility. This architecture…
Visit RISC-V at embedded world 2024!Step into the world of RISC-V at embedded world 2024 in Nuremberg, Germany, April 9-11! Join us as our community showcases the remarkable impact of open collaboration…
RISC-V Technical Leadership UpdateBy: Calista Redmond During the past four years RISC-V has undergone tremendous growth and transformation, both as an organization and in our leadership globally to…
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI WorkloadsSemidynamics has introduced Cervell™, a highly scalable and fully programmable Neural Processing Unit (NPU) architected on RISC-V. Cervell seamlessly merges CPU, vector, and tensor capabilities within…
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI WorkloadsSemidynamics has introduced Cervell™, a highly scalable and fully programmable Neural Processing Unit (NPU) architected on RISC-V. Cervell seamlessly merges CPU, vector, and tensor capabilities within…
Andes teams on FPGA prototyping for RISC-V developmentAndes Technology has teamed with S2C to develop an FPGA-based prototyping system for its latest RISC-V cores with extensions. The strategic deal uses S2C’s new…
S2C and Andes Technology Collaborating to Accelerate Advanced RISC-V SoC DevelopmentS2C and Andes Technology have unveiled the results of a strategic collaboration designed to significantly enhance FPGA prototyping capabilities for developers of advanced System-on-Chip (SoC)…
Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based PlatformSan Jose, CA – April 23, 2025 – Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), the leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding…
RISC-V RVA23—A Major MilestoneRISC-V Profiles, including the RVA23 Profile, help accelerate the growth of the RISC-V ecosystem by ensuring compatibility across RISC-V implementations. The 2024 RISC-V Summit North…
Testing Infineon’s virtual automotive RISC-V chipPLS Programmierbare Logik & Systeme in Germany has added support for the RISC-V open instruction set architecture to test and debug Infineon’s latest automotive processor…
[VIDEO] OpenHW Foundation RISC-V Cores: Empowering the Hardware Revolution for SDVIn this talk, Flo Wohlrab dives deep into the growing impact of industrial-grade, open-source RISC-V cores in the automotive industry, with a spotlight on the…
Canonical Adds the Orange Pi RV2 to Its List of Officially-Supported Ubuntu-Capable RISC-V BoardsCanonical has announced it is adding yet another RISC-V single-board computer to its build list for official Ubuntu Linux operating system images: the recently-released Orange…
Podcast EP282: An Overview of Andes Focus on RISC-V and the Upcoming RISC-V CONDan is joined by Marc Evans, director of business development and technology at Andes. Marc has over twenty years of experience in the use of…
Ubuntu developer images now available for OrangePi RV2: a low-cost RISC-V SBCCanonical, the publisher of Ubuntu, is excited to announce the availability of Ubuntu developer images for the new OrangePi RV2 RISC-V single board computer (SBC). We’re delighted…
A 32-bit RISC-V processor made using molybdenum disulfide instead of siliconA team of engineers at Fudan University has successfully designed, built and run a 32-bit RISC-V microprocessor that uses molybdenum disulfide instead of silicon as…