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MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V MultiprocessorMIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V Multiprocessor
AndeSentry™ Collaborative Framework Enables Comprehensive RISC-V Security Solutions
Milk-V Surprises with a Second RISC-V SBC — Physically Compatible with the Raspberry Pi 3 Model B
Tenstorrent Partners with LG to Build AI and RISC-V Chiplets for Smart TVs of the Future
SiFive Announces Exclusive China Event Series
Axelera AI increases its Series A funding round to $50m for RISC-V edge AI chip
NOEL-V: A RISC-V Processor for High-Performance Space Applications
RISC-V: An Open Standard Instruction Set Architecture
SiFive Gives WorldGuard to RISC-V International to Make this Robust Security Model More Accessible to the RISC-V Community
Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homes
RISC-V Announces Agenda for 2023 RISC-V Summit Europe
RISC-V Is Thriving: Here’s What You Need To Know | Steve Brown, Semiconductor Engineering
SiFive launches Performance P670 and P470 RISC-V energy efficient processors | Bogdan Solca, Notebook CheckCodasip, SiliconArts team on RISC-V ray tracing graphics IP | Nick Flaherty, EE News Europe
SEGGER introduces streaming trace probe for SiFive RISC-V cores | SEGGER
Open source TileLink to AHB bridges with dedicated Cocotb extensions | Antmicro
Lilbits: RISC-V and de-Googled phones, and Qualcomm sees 2024 as the year of the Snapdragon-powered PC | Brad Linder, Liliputing
Andes unveils AndesCore AX65 Out-of-Order RISC-V core for compute intensive applications | Jean-Luc Aufranc, CNX SoftwareAndroid Open Source Project ports to RISC-V | Nick Flaherty, EE News EuropeSiFive P670 and P470 RISC-V processors feature RISC-V Vector Extensions | Jean-Luc Aufranc, CNX Software
With its New RISC-V Processors, SiFive Bets on Compute Density | Jeff Child, All About Circuits
SiFive Reveals New RISC-V Chips, the P670 and P470 | Ian Evenden, Tom’s HardwareT-Head XuanTie C908 RISC-V core targets AIoT applications | Jean-Luc Aufranc, CNX Software
MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V MultiprocessorSAN JOSE, Calif., May 30, 2023 /PRNewswire/ -- MIPS, a leading developer of highly scalable RISC processor IP, has collaborated with Siemens Digital Industries Software, a global electronic design…
MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V MultiprocessorSAN JOSE, Calif., May 30, 2023 /PRNewswire/ -- MIPS, a leading developer of highly scalable RISC processor IP, has collaborated with Siemens Digital Industries Software, a global electronic design…
AndeSentry™ Collaborative Framework Enables Comprehensive RISC-V Security SolutionsHsinchu, Taiwan — May 30, 2023 — Andes Technology Corporation (TWSE: 6533), a Founding and Premier member of RISC-V International and a leading provider of high-performance, low-power 32/64-bit…
Milk-V Surprises with a Second RISC-V SBC — Physically Compatible with the Raspberry Pi 3 Model BRISC-V single-board computer newcomer Milk-V has announced its second hardware design, this time borrowing a very familiar form factor from a certain fruit-themed company: the…
Tenstorrent Partners with LG to Build AI and RISC-V Chiplets for Smart TVs of the FutureTORONTO, May 30, 2023 /PRNewswire/ -- Tenstorrent and LG Electronics Inc. (LG) are pleased to announce that they are collaborating to build a new generation of RISC-V, AI, and…
SiFive Announces Exclusive China Event SeriesIt is an exciting time for SiFive in China and we’re going to be talking about a future powered by our RISC-V solutions at SiFive…
Axelera AI increases its Series A funding round to $50m for RISC-V edge AI chipDutch startup Axelera AI has raised $50m for its in-memory computing, RISC-V-based edge AI technology and set up a Silicon Valley office. CDP Venture Capital,…
NOEL-V: A RISC-V Processor for High-Performance Space ApplicationsSpace applications pose significant challenges for electronic systems as they must contend with a myriad of environmental factors once they are launched. These factors include…
RISC-V: An Open Standard Instruction Set ArchitectureBy Mark Himelstein, CTO of RISC-V International In this blog post, we’ll explain why RISC-V is an open standard instruction set architecture (ISA). We’ve received…
SiFive Gives WorldGuard to RISC-V International to Make this Robust Security Model More Accessible to the RISC-V CommunitySANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the pioneer and leader of RISC-V computing, today announced the company is giving the WorldGuard security model to RISC-V International,…
Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homesNew RISC-V compatible IMG CXM cores with native support for HDR driving down costs in the DTV and wider consumer market Imagination Technologies is bringing seamless…
RISC-V Announces Agenda for 2023 RISC-V Summit EuropeThe first-ever RISC-V Summit Europe includes keynotes, technical talks, working groups, poster sessions, networking opportunities, and more RISC-V International will host its first annual…
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RISC-V Is Thriving: Here’s What You Need To Know | Steve Brown, Semiconductor EngineeringRISC-V, the open-standard Instruction Set Architecture (ISA) conceived by UC Berkeley developers in 2010, is going from strength to strength. The RISC in RISC-V stands…
SiFive launches Performance P670 and P470 RISC-V energy efficient processors | Bogdan Solca, Notebook CheckWith the release of the P670 and P470 RISC-V processors, SiFive plans to deliver competitive alternatives to legacy technologies for the wearables, smart home and…
Codasip, SiliconArts team on RISC-V ray tracing graphics IP | Nick Flaherty, EE News EuropeA high end ray tracing graphics core is shipping with a customisable RISC-V core from German developer Codasip as the first step to integrated low…
SEGGER introduces streaming trace probe for SiFive RISC-V cores | SEGGERSEGGER’s J-Trace PRO with streaming trace, Live Code Profiling, and Live Code Coverage now supports all E-Series SiFive RISC-V cores with the BTM trace module. J-Trace PRO RISC-V, with its…
Open source TileLink to AHB bridges with dedicated Cocotb extensions | AntmicroAntmicro uses open source to introduce pragmatic innovation into areas which have traditionally been heavily reliant on proprietary technologies such as ASIC and FPGA. Due…
Lilbits: RISC-V and de-Googled phones, and Qualcomm sees 2024 as the year of the Snapdragon-powered PC | Brad Linder, LiliputingMicrosoft’s new Windows Dev Kit 2023 is a $600 mini PC with 32GB of RAM, a 512GB PCIe NVMe SSD, and the most powerful Qualcomm Snapdragon processor…
Andes unveils AndesCore AX65 Out-of-Order RISC-V core for compute intensive applications | Jean-Luc Aufranc, CNX SoftwareAndes Technology has unveiled the high-end AndesCore AX60 series out-of-order 64-bit RISC-V processors at the Linley Fall Processor Conference 2022 with the new cores designed…
Android Open Source Project ports to RISC-V | Nick Flaherty, EE News EuropeThe Android Open Source Project (AOSP) has been ported to the RISC-V processor architecture in a key move for the technology. Upstream enablement of RISC-V…
SiFive P670 and P470 RISC-V processors feature RISC-V Vector Extensions | Jean-Luc Aufranc, CNX SoftwareSiFive has announced two new RISC-V Performance cores with the P670 and P470 processors with RISC-V Vector Extension for AI/ML, media and sensor processing, and…
With its New RISC-V Processors, SiFive Bets on Compute Density | Jeff Child, All About CircuitsAiming to usurp Arm processors in size-constrained, compute hungry designs like wearables, SiFive has expanded its RISC-V “Performance” line of processors. The momentum for RISC-V…
SiFive Reveals New RISC-V Chips, the P670 and P470 | Ian Evenden, Tom’s HardwareSiFive announced a pair(opens in new tab) of new high-performance RISC-V(opens in new tab) processors aimed at what it calls "next-generation wearables and smart consumer devices." Known as the…
T-Head XuanTie C908 RISC-V core targets AIoT applications | Jean-Luc Aufranc, CNX SoftwareWe’ve seen two announcements of high-end RISC-V cores this week with the SiFive P670 and Andes AX65 processors each with a 4-way out-of-order pipeline, but Alibaba’s T-Head Semiconductor Xuantie…