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What Does 2023 Have In Store For Chip Design?

Predictions seem to be easier to make during times of stability, but they are no more correct than at any other period. During more turbulent…

5 Takeaways From The RISC-V Summit

After an intense week at the 2022 RISC-V Summit in San Jose, California, I am fueled with energy and positive thoughts. I had plenty of time to…

5 Takeaways From The RISC-V Summit

After an intense week at the 2022 RISC-V Summit in San Jose, California, I am fueled with energy and positive thoughts. I had plenty of time to…

Intel & SiFive Reveal RISC-V Development Board With Quad-Core CPU Based On Intel 4 Process

Intel and RISC-V chip manufacturer, SiFive, are currently collaborating on resources to launch a development board based on the RISC-V architecture called the HiFive Pro…

Google’s Flutter showcases new graphics capabilities, WebAssembly and RISC-V support

Flutter, Google’s open-source framework for building multi-platform apps for mobile, web and desktop, is hosting its Flutter Forward event in Nairobi, Kenya today. As the name implies,…

Xuantie RISC-V TEE solution for MCU

Author: Lijie Mao 1. Overview TEE (Trusted Execution Enviroment) has been the most widely used method for device security protection. In this article, we will…

RISC-V RV32I RTL Verification using UVM | Maven Silicon Blog

By: Putta Satish, Principal Engineer, Maven Silicon In this demo video, Putta Satish explains the complete RISC-V DV flow: RISC-V RTL pipeline architecture overview, RISC-V…

These simple design rules could turn the chip industry on its head

Python, Java, C++, R. In the seven decades or so since the computer was invented, humans have devised many programming languages—largely mishmashes of English words…

HiFive Pro P550 “Horse Creek” RISC-V motherboard with 16GB RAM to launch this summer

SiFive HiFive Pro P550 RISC-V motherboard based on Intel “Horse Creek” quad-core SiFive Performance P550 processor will launch this summer with 16GB DDR5 memory, two…

Bluespec Teams Up with Synopsys for RISC-V Core Verification Effort

As the RISC-V movement gains significant traction in the industry, many engineers are finding exciting new ways of implementing the technology. Amongst these, RISC-V has become particularly popular…

The Semiconductor Shortage: How RISC-V & Other Technologies are Taking Advantage

With the semiconductor shortage showing signs of improvement, engineers now have the chance to explore new hardware platforms and alternatives. The current supply chain issues…

RISC-V Foundation’s Chairman says: “All Your Cores Are Belong to Us”

When RISC-V International’s chairman of the board Krste Asanović took the stage to report on the state of the RISC-V union at last month’s RISC-V…

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China’s RISC-V pioneer raises funds for IoT, automotive push | Peter Clarke, EE News

RISC-V processor IP company Nuclei System Technology Co. Ltd. (Shanghai, China) has raised hundreds of millions of yuan (100 million yuan is about US$15 million)…

Ubuntu Now Supports The Allwinner D1 Powered Nezha RISC-V Board | Michael Larabel, Phoronix

Last week Canonical announced official Ubuntu RISC-V images for the StarFive VisionFive board while this week they are expanding their supported RISC-V line-up to also include the…

LeapFive NB2 quad-core RISC-V processor comes with GPU, NPU, and DSP | Jean-Luc Aufranc, CNX Software

After SiFive and StarFive, here comes LeapFive RISC-V silicon vendor offering the NB2 quad-core 64-bit RISC-V application processor with GPU, NPU, and vision and audio DSPs capable…

Implementing Cryptographic Algorithms For The RISC-V Instruction Set Architecture In Two Cases | Intel, North Arizona University and Google, Semiconductor Engineering

This new technical paper titled “Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms” was published by researchers at Intel, North Arizona University and Google,…

StarFive VisionFive V1 RISC-V SBC gets Ubuntu 22.04.1 Server image from Canonical | Jean-Luc Aufranc, CNX Software

Canonical has been working on RISC-V support for Ubuntu for a while and released Ubuntu 20.04/21.04 64-bit RISC-V images for QEMU and HiFive boards last year. Now…

RISC-V Processor IP Provider Nuclei Technology Secures New Funding | Pandaily

Nuclei Technology, a provider of RISC-V processor IP and related overall solutions, announced on August 18 that it has completed a new round of financing…

First RISC-V processor starts operation in orbit | Nick Flaherty, EE News Europe

The first RISC-V processor is space has started operation in a European nanosat. The Trisat-R nanosat developed by the University of Maribor in Slovenia uses…

Now you can run Ubuntu on a VisionFive single-board PC with a RISC-V processor | Brad Linder, Liliputing

StarFive’s VisionFive single-board computers are compact PCs powered by RISC-V processors. Aimed at developers, the first model launched last year with a dual-core processor, while a second-gen version…

StarFive VisionFive V1 RISC-V SBC gets Ubuntu 22.04.1 Server image from Canonical | Jean-Luc Aufranc, CNX Software

Canonical has been working on RISC-V support for Ubuntu for a while and released Ubuntu 20.04/21.04 64-bit RISC-V images for QEMU and HiFive boards last year. Now…

Crypto Quantique joins RISC-V International | Nick Flaherty, EE News Europe

London-based embedded security startup Crypto Quantique has joined RISC-V International, the industry group for the open standard processor technology. “Our mission is to provide seamless…

Andes, Green Hills team for RISC-V automotive safety | Nick Flaherty, EE News Europe

Andes Technology is working with Green Hills Software (GHS) on an integrated RISC-V automotive safety platform with hardware and software. This will use the AndesCore…

Andes Technology and Green Hills Software Team Up to Deliver Advanced Automotive Safety Platform for RISC-V | Andes Technologies

Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP vendor and a Founding and Premier member of RISC-V International, and Green…