By running an open-source NVIDIA Deep Learning Accelerator directly on a RISC-V chip (without a traditional operating system), a group of researchers has achieved impressive performance and energy efficiency.
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EMASS has introduced the ECS-DoT, a 22nm microprocessor designed to bring milliWatt-scale intelligence directly to edge and IoT devices.
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SiFive just announced an array of new additions to its product stack that run the gamut, from tiny, ultra lower-power designs for far edge IoT devices, to more powerful engines…
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We explore how companies across industries are proving the viability of RISC-V as a native architecture for modern AI workloads
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by Ashley Stevens, Director of Product Management and Marketing at Arteris The amount of compute used to train frontier AI models has been doubling roughly every five to six months, but…
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By setting a clear, stable standard, the RVA23 profile’s ratification is spurring top vendors to align on a common RISC-V hardware goal. All we need now is that hardware to…
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As modern space missions evolve in complexity, the role of software onboard spacecraft is undergoing a dramatic transformation. Spacecraft are no longer limited to basic telemetry and remote control. Today, onboard computing…
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At the 2025 RISC-V Summit in China, Nvidia announced that its CUDA software platform will be made compatible with the RISC-V instruction set architecture (ISA) on the CPU side of…
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MALTA, N.Y. and SAN JOSE, Calif., July 08, 2025 (GLOBE NEWSWIRE) -- GlobalFoundries (Nasdaq: GFS) (GF) today announced a definitive agreement to acquire MIPS, a leading supplier of AI and…
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Qualifying an AI-class RISC-V SoC demands proving that wide vectors, deep caches, and high-speed I/O operate flawlessly long before tape-out. At the recent Andes RISC-V Conference, Andes Technology and S2C…
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