Porting and Optimizing Android ART on XuanTie C910By Lifang Xia Over the past three years, our team has undertaken the substantial task of porting Android 10 and Android 12 to the XuanTie…
Developing and testing heterogeneous space-grade systems with RenodeWhile landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft…
Announcing The Fourth International Workshop on RISC-V for HPCThe RISC-V HPC Special Interest Group is organising a workshop at ISC24, one of the leading High Performance Computing (HPC) conferences. The workshop will run…
Integrating ROS 2 With Microchip’s PolarFire® SoC FPGAROS (Robot Operating System) is a popular open-source framework used for creating robotics applications. It provides a set of tools and libraries for building complex…
OPC UA on PolarFire SoC: Enabling Industrial Edge SolutionsWebpage: https://www.microchip.com/en-us/solutions/industrial/fpga/opc-ua Author: Apurva Peri, Principal Engineer, FPGA Product Marketing The Modern Industrial Edge The Industrial Edge has become the standard for industrial automation requirements,…
The Rise of RISC-V – Analyzing Market Trends and Ecosystem DynamicsAuthor- Rich Wawrzyniak Principal Analyst at The SHD Group As we start 2024, The SHD Group has released a comprehensive market analysis report titled "RISC-V…
Expanding RISC-V support in Renode with Bit-Manipulation extensionsAntmicro’s open source Renode simulation framework offers support for various instruction set architectures, with the RISC-V ISA being a major focus for – as a…
Five years of SERVingAuthor: Olof Kindgren Making your own RISC-V CPU is a terrible idea. I have said that many times before. There are already a million RISC-V…
The Top 10 RISC-V Milestones & Highlights from 2023Looking back at 2023, there are many different ways to measure progress and success. You could point to the growing adoption of RISC-V—which is in…
Developing and testing with Renode in heterogeneous, multi-node automotive use casesAutomotive engineering in the past 30 years has been transformed by the growing capabilities of microprocessors, enabling their use in a wide range of the…
Solving bus and software deadlock problems in complex SoCsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager Intermittent bus and software deadlocks are amongst the toughest problems for development teams…
Porting and Optimizing Android ART on XuanTie C910By Lifang Xia Over the past three years, our team has undertaken the substantial task of porting Android 10 and Android 12 to the XuanTie…
Developing and testing heterogeneous space-grade systems with RenodeWhile landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft…
Announcing The Fourth International Workshop on RISC-V for HPCThe RISC-V HPC Special Interest Group is organising a workshop at ISC24, one of the leading High Performance Computing (HPC) conferences. The workshop will run…
Integrating ROS 2 With Microchip’s PolarFire® SoC FPGAROS (Robot Operating System) is a popular open-source framework used for creating robotics applications. It provides a set of tools and libraries for building complex…
OPC UA on PolarFire SoC: Enabling Industrial Edge SolutionsWebpage: https://www.microchip.com/en-us/solutions/industrial/fpga/opc-ua Author: Apurva Peri, Principal Engineer, FPGA Product Marketing The Modern Industrial Edge The Industrial Edge has become the standard for industrial automation requirements,…
The Rise of RISC-V – Analyzing Market Trends and Ecosystem DynamicsAuthor- Rich Wawrzyniak Principal Analyst at The SHD Group As we start 2024, The SHD Group has released a comprehensive market analysis report titled "RISC-V…
Expanding RISC-V support in Renode with Bit-Manipulation extensionsAntmicro’s open source Renode simulation framework offers support for various instruction set architectures, with the RISC-V ISA being a major focus for – as a…
Five years of SERVingAuthor: Olof Kindgren Making your own RISC-V CPU is a terrible idea. I have said that many times before. There are already a million RISC-V…
The Top 10 RISC-V Milestones & Highlights from 2023Looking back at 2023, there are many different ways to measure progress and success. You could point to the growing adoption of RISC-V—which is in…
Developing and testing with Renode in heterogeneous, multi-node automotive use casesAutomotive engineering in the past 30 years has been transformed by the growing capabilities of microprocessors, enabling their use in a wide range of the…
Solving bus and software deadlock problems in complex SoCsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager Intermittent bus and software deadlocks are amongst the toughest problems for development teams…