Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingBy: Dario Sassi Thober, thober@vonbraunlabs.com.br & Rafael Vidal Aroca, aroca@vonbraunlabs.com.br São Paulo, September 26th, 2023 Today’s global landscape is saturated with access control systems. Acura, part of…
It’s not just about the core, it’s also about the systemBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager As more companies design new many-core architectures to gain an advantage over competitors,…
How to Design a RISC-V Space MicroprocessorIntroduction In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Whether exploring the depths of…
DeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsROMA, the world's first native RISC-V powered laptop from DeepComputing, has been shipped to domestic customers and also been arranged for international logistics shipments to…
Introducing the RISC-V Board of Directors Elected OfficersBy: Calista Redmond | CEO, RISC-V International The past few years have seen a meteoric rise of RISC-V globally. In eight short years, RISC-V International…
RISC-V co-design using trace-based simulation with Renode and TBMThe design of modern hardware components such as processors and accelerators is a multidisciplinary effort at the intersection of hardware and software development. Hardware-software co-design…
RISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverBy PerfXLab Introduction PerfXLab was founded in 2016. Our core team is from Chinese Academy of Sciences. We dedicate to the research and development of…
Debugging a RISC-V processor requires integrated hardware and software toolsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager To debug a RISC-V processor that comprises tens or hundreds of cores and…
Cloud-V: Accelerating RISC-V Software Development with 10xEngineersThe momentum that RISC-V is seeing across the compute spectrum is undeniable. As we saw at the RISC-V Summit and Summit Europe, RISC-V based computing…
Oral History of Mark Himelstein | CTO of RISC-V InternationalMark grew up in Pennsylvania and took a somewhat circuitous path to earning a BS in Math and Computer Science at Wilkes University in 1981.…
Cool PolarFire® SoC FPGA Based System On Modules by ARIES EmbeddedField Programmable Gate Arrays (FPGAs) are known for their flexibility and reconfigurability, making them suitable for a wide range of applications. However, they are also…
RISC-V Expanding In ChinaBy: Kezia Leung The RISC-V Summit China 2023 is just around the corner, and during RISC-V Summit Europe Dr. Yungang Bao shared some fascinating insight…
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingBy: Dario Sassi Thober, thober@vonbraunlabs.com.br & Rafael Vidal Aroca, aroca@vonbraunlabs.com.br São Paulo, September 26th, 2023 Today’s global landscape is saturated with access control systems. Acura, part of…
It’s not just about the core, it’s also about the systemBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager As more companies design new many-core architectures to gain an advantage over competitors,…
How to Design a RISC-V Space MicroprocessorIntroduction In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Whether exploring the depths of…
DeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsROMA, the world's first native RISC-V powered laptop from DeepComputing, has been shipped to domestic customers and also been arranged for international logistics shipments to…
Introducing the RISC-V Board of Directors Elected OfficersBy: Calista Redmond | CEO, RISC-V International The past few years have seen a meteoric rise of RISC-V globally. In eight short years, RISC-V International…
RISC-V co-design using trace-based simulation with Renode and TBMThe design of modern hardware components such as processors and accelerators is a multidisciplinary effort at the intersection of hardware and software development. Hardware-software co-design…
RISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverBy PerfXLab Introduction PerfXLab was founded in 2016. Our core team is from Chinese Academy of Sciences. We dedicate to the research and development of…
Debugging a RISC-V processor requires integrated hardware and software toolsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager To debug a RISC-V processor that comprises tens or hundreds of cores and…
Cloud-V: Accelerating RISC-V Software Development with 10xEngineersThe momentum that RISC-V is seeing across the compute spectrum is undeniable. As we saw at the RISC-V Summit and Summit Europe, RISC-V based computing…
Oral History of Mark Himelstein | CTO of RISC-V InternationalMark grew up in Pennsylvania and took a somewhat circuitous path to earning a BS in Math and Computer Science at Wilkes University in 1981.…
Cool PolarFire® SoC FPGA Based System On Modules by ARIES EmbeddedField Programmable Gate Arrays (FPGAs) are known for their flexibility and reconfigurability, making them suitable for a wide range of applications. However, they are also…
RISC-V Expanding In ChinaBy: Kezia Leung The RISC-V Summit China 2023 is just around the corner, and during RISC-V Summit Europe Dr. Yungang Bao shared some fascinating insight…