Blog

T-Head DSA design in RISC-V | Chaojun Zhao, Alibaba Cloud Blog

T-Head DSA design in RISC-V | Chaojun Zhao, Alibaba Cloud

To get better performance or lower power consumption for specific applications an acceleration ASIC IP…

RISC-V Community NewsAugust 21, 2022

RISC-V Summit China 2022 Announces Agenda | RISC-V International Blog

RISC-V Summit China 2022 Announces Agenda | RISC-V International

2nd RISC-V Summit in China will be broadcast online with 12 concurrent in-person events in…

RISC-V Community NewsAugust 11, 2022

Defend Your Devices Against a Common and Insidious Hack With seL4 | Microchip Technologies Blog

Defend Your Devices Against a Common and Insidious Hack With seL4 | Microchip Technologies

How Secure is Your Software? It’s a simple question with—perhaps all too often—a complex answer.…

RISC-V Community NewsAugust 8, 2022

Welcoming RISC-V International Board Members Blog

Welcoming RISC-V International Board Members

Welcome to Our New Elected RISC-V Board Members By Calista Redmond, CEO RISC-V International, August…

Brett PrestonAugust 1, 2022

Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud Blog

Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud

Recent rapid development of various applications represented by Deep Learning (DL) calls for a much-needed…

RISC-V Community NewsJuly 28, 2022

Porting GNOME OS to Microchip’s PolarFire® SoC FPGA Icicle Kit for the First Time | Microchip Blog

Porting GNOME OS to Microchip’s PolarFire® SoC FPGA Icicle Kit for the First Time | Microchip

Customers often require support to bring up new boards and architectures on Linux. Our Mi-V…

RISC-V Community NewsJuly 26, 2022

Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro Blog

Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro

The landscape of Machine Learning software libraries and models is evolving rapidly, and to satisfy…

RISC-V Community NewsJuly 18, 2022

Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto Technologies Inc Blog

Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto Technologies Inc

Machine learning (ML) recommendation workloads have demanding performance and memory requirements and, to date, have…

RISC-V Community NewsJuly 18, 2022

RISC-V Compressed Instructions for SERV | Abdul Wadood, LFX Mentorship at RISC-V International Blog

RISC-V Compressed Instructions for SERV | Abdul Wadood, LFX Mentorship at RISC-V International

In Spring 2022, various mentorship projects were offered by RISC-V International on the LFX platform…

RISC-V Community NewsJuly 11, 2022

Everything RISC-V at the Design Automation Conference! | RISC-V International Blog

Everything RISC-V at the Design Automation Conference! | RISC-V International

The Design Automation Conference is here and we're thrilled to share look at all the…

RISC-V Community NewsJuly 11, 2022

Progress in Porting Android onto RISC-V: Android 12 upgrade, vendor modules and TensorFlow Lite | Mao Han, Alibaba Cloud Blog

Progress in Porting Android onto RISC-V: Android 12 upgrade, vendor modules and TensorFlow Lite | Mao Han, Alibaba Cloud

Last year Alibaba T-Head reported that the basic features of Android had been ported onto…

RISC-V Community NewsJuly 9, 2022

PolarFire® SoC FPGA in Conclusive RCHD-PF System Module | Microchip Blog

PolarFire® SoC FPGA in Conclusive RCHD-PF System Module | Microchip

Operational Technology (OT) and Transportation and Industrial Control Systems (ICS) are often forced to make…

RISC-V Community NewsJuly 7, 2022

DeepComputing and Xcalibyte Open Pre-Orders for First Native RISC-V Development Laptop; Quantities Limited | Xcalibyte and Deep Computing Blog

DeepComputing and Xcalibyte Open Pre-Orders for First Native RISC-V Development Laptop; Quantities Limited | Xcalibyte and Deep Computing

ROMA development platform features forthcoming quad-core RISC-V processor for fastest, seamless RISC-V software development experience.…

RISC-V Community NewsJuly 1, 2022

SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore Blog

SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore

YADRO and Syntacore hosted the first ever engineering hackathon for students in Russia. The event…

RISC-V Community NewsJune 27, 2022

Democratizing Chiplet-Based Processor Design | Ventana Micro Systems Blog

Democratizing Chiplet-Based Processor Design | Ventana Micro Systems

By Bob Wheeler, Principal Analyst, The Linley Group Chiplet-based designs promise reduced development costs and…

RISC-V Community NewsJune 20, 2022

RISC-V Vector Processing is Taking Off | SiFive Blog

RISC-V Vector Processing is Taking Off | SiFive

The RISC-V Vector Extension (RVV) Version 1.0 was ratified by RISC-V International in 2021. Since…

RISC-V Community NewsJune 20, 2022

GreenWaves will Demonstrate Live the Ground-breaking AI and DSP Demos on its Ultra Low Power Chip at Embedded World 2022 | GreenWaves Technologies Blog

GreenWaves will Demonstrate Live the Ground-breaking AI and DSP Demos on its Ultra Low Power Chip at Embedded World 2022 | GreenWaves Technologies

Located in the micro-and nano-electronics hotspot of Grenoble, GreenWaves is a fabless semiconductor startup that…

RISC-V Community NewsJune 20, 2022

Overtake the Competition in Automotive Design with RISC-V Innovations | Codasip Blog

Overtake the Competition in Automotive Design with RISC-V Innovations | Codasip

In conversation with Jamie Broome, Codasip VP of Automotive   Jamie Broome recently joined Codasip…

RISC-V Community NewsJune 20, 2022

Renode 1.13 for improved machine learning and pre-silicon development | Antmicro Blog

Renode 1.13 for improved machine learning and pre-silicon development | Antmicro

After a longer while, we are excited to announce that the next release of Renode is here.…

RISC-V Community NewsJune 17, 2022

Thermal (IR) Imaging Pipeline (ISP) Core on PolarFire® SoC FPGA SoM | Microchip BlogWhat's New

Thermal (IR) Imaging Pipeline (ISP) Core on PolarFire® SoC FPGA SoM | Microchip

Our Mi-V partner, Digital Core Technologies (DCT), has developed a thermal Imaging Pipeline on PolarFire®…

RISC-V Community NewsJune 16, 2022

XuanTie C906 Tops MLPerf Tiny v0.7 Benchmark | MengChang, Alibaba Cloud Blog

XuanTie C906 Tops MLPerf Tiny v0.7 Benchmark | MengChang, Alibaba Cloud

XuanTie C906 is a processor developed by Alibaba Cloud based on the RISC-V instruction set…

RISC-V Community NewsJune 13, 2022

Why MIPS is Betting Big on RISC-V: Q&A with RISC-V International and MIPS | MIPS Blog

Why MIPS is Betting Big on RISC-V: Q&A with RISC-V International and MIPS | MIPS

MIPS recently announced that the company is pivoting to RISC-V and introduced its first MIPS…

RISC-V Community NewsJune 8, 2022

RISC-V Summit China 2022 Call for Talks is Now Open Blog

RISC-V Summit China 2022 Call for Talks is Now Open

The RISC-V Summit China 2022 will showcase the continued rapid expansion of the RISC-V ecosystem,…

RISC-V Community NewsJune 2, 2022

Simplifying the Vehicle to Anything (V2X) Journey: Porting of Jamaica VM on PolarFire® SoC Icicle Kit | Leah Iris, Microchip Blog

Simplifying the Vehicle to Anything (V2X) Journey: Porting of Jamaica VM on PolarFire® SoC Icicle Kit | Leah Iris, Microchip

Industries like manufacturing and automotive are facing the challenges of getting access to device-wide data,…

RISC-V Community NewsMay 23, 2022

MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability | MIPS Blog

MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability | MIPS

MIPS previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors.…

RISC-V Community NewsMay 10, 2022