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RISC-V International and the RISE Project Join Forces for Yocto Project Support
SiFive Partners with Kinara to Put Two RISC-V Cores and 40 TOPS of Ara-2 Compute on a USB Stick
Andrea Gallo Named CEO of RISC-V InternationalRISC-V International Promotes Andrea Gallo to CEO
China Initiates Development of RISC-V Talent Training Specifications
RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
Quintauris and SEGGER Collaborate on RISC-V Development
50 TOPS DC-ROMA RISC-V AI PC is Here!
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V Platforms
Codasip platform accelerates CHERI adoption
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI Workloads
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI Workloads
Developing and testing heterogeneous space-grade systems with Renode
Announcing The Fourth International Workshop on RISC-V for HPC
Integrating ROS 2 With Microchip’s PolarFire® SoC FPGA
OPC UA on PolarFire SoC: Enabling Industrial Edge Solutions
The Rise of RISC-V – Analyzing Market Trends and Ecosystem Dynamics
Expanding RISC-V support in Renode with Bit-Manipulation extensions
Five years of SERVing
The Top 10 RISC-V Milestones & Highlights from 2023
Developing and testing with Renode in heterogeneous, multi-node automotive use cases
Solving bus and software deadlock problems in complex SoCsRISC-V Summit 2023: RISC-V is Here for Developers!
Developing and testing heterogeneous space-grade systems with RenodeAnnouncing The Fourth International Workshop on RISC-V for HPCIntegrating ROS 2 With Microchip’s PolarFire® SoC FPGAOPC UA on PolarFire SoC: Enabling Industrial Edge SolutionsThe Rise of RISC-V – Analyzing Market Trends and Ecosystem DynamicsExpanding RISC-V support in Renode with Bit-Manipulation extensionsFive years of SERVingThe Top 10 RISC-V Milestones & Highlights from 2023Developing and testing with Renode in heterogeneous, multi-node automotive use casesSolving bus and software deadlock problems in complex SoCsRISC-V Summit 2023: RISC-V is Here for Developers!
Embedded World, Nuremberg: Tasking Strengthens its Ecosystem with LDRA Acquisition and RISC-V SupportTo boldly big-endian where no one has big-endianded before
Infineon brings RISC-V to the automotive industry and is first to announce an automotive RISC-V microcontroller family
LDRA Joins Microchip’s Mi-V Ecosystem, Expanding Functional Safety and Security Support for the RISC-V® Architecture
Infineon, Synopsys to show virtual prototype of first automotive RISC-V microcontroller
Outlook 2025: The Role of RISC-V in Shaping the Future
RISC-V for cars: Infineon announces microcontroller with new computing cores
How The Ubuntu Linux Performance Has Evolved For SiFive RISC-V Over The Last Four Years
Semidynamics launches RISC-V SDK, adds ONNX Runtime support
Baya Systems and Semidynamics Collaborate to Accelerate RISC-V System-on-Chip Development
Andes Technology and proteanTecs Partner to Bring Performance and Reliability Monitoring to RISC-V Cores
What’s on tap from RISC-V in 2025?
RISC-V International and the RISE Project Join Forces for Yocto Project SupportRISC-V International and the RISE Project are teaming up to participate in the Yocto Project. RISC-V International has upgraded from Silver to a Platinum membership…
SiFive Partners with Kinara to Put Two RISC-V Cores and 40 TOPS of Ara-2 Compute on a USB StickRISC-V pioneer SiFive has announced a partnership with energy-efficient edge artificial intelligence (edge AI) specialist Kinara to launch a USB gadget designed to provide developers…
Andrea Gallo Named CEO of RISC-V InternationalRISC-V International has appointed Andrea Gallo as CEO, effective immediately. Previously vice president of Technology at the organization, Gallo brings extensive experience in open ecosystems…
RISC-V International Promotes Andrea Gallo to CEORISC-V International announces Andrea Gallo as the organization’s new CEO, effective immediately. Gallo has served as Vice President of Technology at RISC-V International since June…
China Initiates Development of RISC-V Talent Training SpecificationsBeijing, April 16, 2025 — The RISC-V Talent Training Specification Workshop, organized by the Beijing Institute of Open Source Chip (BOSC) was convened. The workshop…
RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027At last month’s Andes Technology RISC-V Con event in San Jose, CA, the company announced a number of partnerships with companies like Imagination Technologies, Baya…
Quintauris and SEGGER Collaborate on RISC-V DevelopmentMay 9, 2025 — SEGGER has announced a partnership with Quintauris to support the growing RISC-V ecosystem through new development tools and hardware for automotive, industrial, and IoT markets.…
50 TOPS DC-ROMA RISC-V AI PC is Here!DeepComputing, in collaboration with Framework and powered by ESWIN Computing’s advanced RISC-V multi-purpose intelligent computing SoC EIC7702X—featuring 8 SiFive’s high-performance P550 CPU cores and pre-installed with Ubuntu Desktop 24.04 LTS— proudly announces the availability of the…
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V PlatformsLaguna Hills, California. BrainChip Holdings Ltd released information it is now integrating Andes Technology’s RISC-V cores with its NPUs. According to the press release, the companies will exhibit BrainChip’s…
Codasip platform accelerates CHERI adoptionCodasip Prime comprises pre-silicon hardware and software development kits to realise state-of-the-art memory-safe compute. The platform is based on the Codasip X730 application core, which…
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI WorkloadsSemidynamics has introduced Cervell™, a highly scalable and fully programmable Neural Processing Unit (NPU) architected on RISC-V. Cervell seamlessly merges CPU, vector, and tensor capabilities within…
Semidynamics Unveils Cervell™: A Scalable RISC-V Neural Processing Unit for Next-Gen AI WorkloadsSemidynamics has introduced Cervell™, a highly scalable and fully programmable Neural Processing Unit (NPU) architected on RISC-V. Cervell seamlessly merges CPU, vector, and tensor capabilities within…
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Developing and testing heterogeneous space-grade systems with RenodeWhile landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft…
Announcing The Fourth International Workshop on RISC-V for HPCThe RISC-V HPC Special Interest Group is organising a workshop at ISC24, one of the leading High Performance Computing (HPC) conferences. The workshop will run…
Integrating ROS 2 With Microchip’s PolarFire® SoC FPGAROS (Robot Operating System) is a popular open-source framework used for creating robotics applications. It provides a set of tools and libraries for building complex…
OPC UA on PolarFire SoC: Enabling Industrial Edge SolutionsWebpage: https://www.microchip.com/en-us/solutions/industrial/fpga/opc-ua Author: Apurva Peri, Principal Engineer, FPGA Product Marketing The Modern Industrial Edge The Industrial Edge has become the standard for industrial automation requirements,…
The Rise of RISC-V – Analyzing Market Trends and Ecosystem DynamicsAuthor- Rich Wawrzyniak Principal Analyst at The SHD Group As we start 2024, The SHD Group has released a comprehensive market analysis report titled "RISC-V…
Expanding RISC-V support in Renode with Bit-Manipulation extensionsAntmicro’s open source Renode simulation framework offers support for various instruction set architectures, with the RISC-V ISA being a major focus for – as a…
Five years of SERVingAuthor: Olof Kindgren Making your own RISC-V CPU is a terrible idea. I have said that many times before. There are already a million RISC-V…
The Top 10 RISC-V Milestones & Highlights from 2023Looking back at 2023, there are many different ways to measure progress and success. You could point to the growing adoption of RISC-V—which is in…
Developing and testing with Renode in heterogeneous, multi-node automotive use casesAutomotive engineering in the past 30 years has been transformed by the growing capabilities of microprocessors, enabling their use in a wide range of the…
Solving bus and software deadlock problems in complex SoCsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager Intermittent bus and software deadlocks are amongst the toughest problems for development teams…
RISC-V Summit 2023: RISC-V is Here for Developers!RISC-V Summit North America 2023 brought the RISC-V ecosystem together to share the latest technology solutions, proving that #riscvishere! A key takeaway from the show…
No recent posts listed
Developing and testing heterogeneous space-grade systems with RenodeWhile landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft…
Announcing The Fourth International Workshop on RISC-V for HPCThe RISC-V HPC Special Interest Group is organising a workshop at ISC24, one of the leading High Performance Computing (HPC) conferences. The workshop will run…
Integrating ROS 2 With Microchip’s PolarFire® SoC FPGAROS (Robot Operating System) is a popular open-source framework used for creating robotics applications. It provides a set of tools and libraries for building complex…
OPC UA on PolarFire SoC: Enabling Industrial Edge SolutionsWebpage: https://www.microchip.com/en-us/solutions/industrial/fpga/opc-ua Author: Apurva Peri, Principal Engineer, FPGA Product Marketing The Modern Industrial Edge The Industrial Edge has become the standard for industrial automation requirements,…
The Rise of RISC-V – Analyzing Market Trends and Ecosystem DynamicsAuthor- Rich Wawrzyniak Principal Analyst at The SHD Group As we start 2024, The SHD Group has released a comprehensive market analysis report titled "RISC-V…
Expanding RISC-V support in Renode with Bit-Manipulation extensionsAntmicro’s open source Renode simulation framework offers support for various instruction set architectures, with the RISC-V ISA being a major focus for – as a…
Five years of SERVingAuthor: Olof Kindgren Making your own RISC-V CPU is a terrible idea. I have said that many times before. There are already a million RISC-V…
The Top 10 RISC-V Milestones & Highlights from 2023Looking back at 2023, there are many different ways to measure progress and success. You could point to the growing adoption of RISC-V—which is in…
Developing and testing with Renode in heterogeneous, multi-node automotive use casesAutomotive engineering in the past 30 years has been transformed by the growing capabilities of microprocessors, enabling their use in a wide range of the…
Solving bus and software deadlock problems in complex SoCsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager Intermittent bus and software deadlocks are amongst the toughest problems for development teams…
RISC-V Summit 2023: RISC-V is Here for Developers!RISC-V Summit North America 2023 brought the RISC-V ecosystem together to share the latest technology solutions, proving that #riscvishere! A key takeaway from the show…
Embedded World, Nuremberg: Tasking Strengthens its Ecosystem with LDRA Acquisition and RISC-V SupportAt Embedded World in Nuremberg, Germany, Maurizio Di Paolo Emilio, Editor-in-Chief of Embedded.com, interviewed Gregor Zink, CEO, and Christoph Herzog, CTO of Tasking. The discussion…
To boldly big-endian where no one has big-endianded beforeThe RISC-V Privileged ISA specification, allows for controlling the core data endian (the order in which the data is stored in memory) at runtime, using bits in…
Infineon brings RISC-V to the automotive industry and is first to announce an automotive RISC-V microcontroller familyMunich, Germany – 6 March 2025 – Infineon Technologies AG (FSE: IFX / OTCQX: IFNNY) leads the way for the adoption of RISC-V in the…
LDRA Joins Microchip’s Mi-V Ecosystem, Expanding Functional Safety and Security Support for the RISC-V® ArchitectureWIRRAL, England--(BUSINESS WIRE)--LDRA, a leader in automated software verification, traceability and standards compliance for 50 years, today announced it has joined Microchip’s Mi-V ecosystem by adding support…
Infineon, Synopsys to show virtual prototype of first automotive RISC-V microcontrollerInfineon Technologies is to show a virtual prototype of a microcontroller based on the RISC-V open instruction set architecture for automotive applications next week. This…
Outlook 2025: The Role of RISC-V in Shaping the FutureAs the global economy edges towards recovery in 2025, key industries and groundbreaking technologies are anticipated to drive the resurgence. Among these, artificial intelligence (AI),…
RISC-V for cars: Infineon announces microcontroller with new computing coresInfineon is increasingly focusing on the open processor instruction set architecture RISC-V. Over the next few years, the manufacturer intends to launch a complete microcontroller…
How The Ubuntu Linux Performance Has Evolved For SiFive RISC-V Over The Last Four YearsSiFive recently sent over their new HiFive Premier P550 developer board and as part of that fresh RISC-V CPU testing I've also been re-testing the…
Semidynamics launches RISC-V SDK, adds ONNX Runtime supportSemidynamics in Spain has integrated support for its RISC-V AI accelerator hardware IP into the ONNX Runtime environment with the launch of a software development…
Baya Systems and Semidynamics Collaborate to Accelerate RISC-V System-on-Chip DevelopmentSANTA CLARA, Calif. and BARCELONA, Spain, Feb. 25, 2025 /PRNewswire/ -- Baya Systems, a leader in system IP technology that empowers the acceleration of intelligent compute, and Semidynamics, a provider of…
Andes Technology and proteanTecs Partner to Bring Performance and Reliability Monitoring to RISC-V CoresTAIPEI, Taiwan & HAIFA, Israel--(BUSINESS WIRE)--Andes Technology Corporation (TWSE: 6533), a leading supplier of RISC-V processor IP, and proteanTecs, a global leader of health and…
What’s on tap from RISC-V in 2025?Andrea Gallo from RVI speaks to JPR’s David Harold about RISC-V’s future. RISC-V is moving towards further standardization with the RVA23 Profile, ensuring software compatibility…