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[VIDEO] OpenHW Foundation RISC-V Cores: Empowering the Hardware Revolution for SDV
Canonical Adds the Orange Pi RV2 to Its List of Officially-Supported Ubuntu-Capable RISC-V Boards
Podcast EP282: An Overview of Andes Focus on RISC-V and the Upcoming RISC-V CON
Ubuntu developer images now available for OrangePi RV2: a low-cost RISC-V SBC
Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries (Vectorization)
RISC-V Powered Executive M.Tech VLSI PG Program for Next-Gen Chip Designers
A 32-bit RISC-V processor made using molybdenum disulfide instead of silicon
[VIDEO] Canonical x Rivos: Delivering scalable RISC-V solutions in Data Centers
Frontgrade Gaisler Launches New GRAIN Line and Wins SNSA Contract to Commercialize First Energy-Efficient Neuromorphic AI for Space Applications
2025 RISC-V CON: Andes Technology Celebrates 20 Years, Bringing Together Innovators, Engineers, and Ecosystem Leaders
Frontgrade Gaisler to commercialise neuromorphic AI for space
RISC-V: An Open Standard – Backed by a Global Community – to Enable Open Computing for AllAcura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow Tolling
It’s not just about the core, it’s also about the system
How to Design a RISC-V Space Microprocessor
DeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsIntroducing the RISC-V Board of Directors Elected Officers
RISC-V co-design using trace-based simulation with Renode and TBM
RISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverDebugging a RISC-V processor requires integrated hardware and software tools
Cloud-V: Accelerating RISC-V Software Development with 10xEngineers
Oral History of Mark Himelstein | CTO of RISC-V International
Cool PolarFire® SoC FPGA Based System On Modules by ARIES Embedded
RISC-V: An Open Standard – Backed by a Global Community – to Enable Open Computing for AllAcura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingIt’s not just about the core, it’s also about the systemHow to Design a RISC-V Space MicroprocessorDeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsIntroducing the RISC-V Board of Directors Elected OfficersRISC-V co-design using trace-based simulation with Renode and TBMRISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverDebugging a RISC-V processor requires integrated hardware and software toolsCloud-V: Accelerating RISC-V Software Development with 10xEngineersOral History of Mark Himelstein | CTO of RISC-V InternationalCool PolarFire® SoC FPGA Based System On Modules by ARIES Embedded
Groundbreaking Formal Verification Further Enhances the Quality of CHERIoT-Ibex
First RISC-V mainboard for modular laptop
VyperCore launches VyperLab, an evaluation platform to showcase its innovative compute accelerator technology
Nvidia RTX 5090 Graphics Card Review — Get Neural Or Get Left Behind
Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
Tiny RISC-V chip for the digital product passport (DPP)
A Complete Overview of RISC-V Open ISA for Your Quick ReferenceSupport added in RISC-V IP for automotive high safety and security applications
EDACafe Industry Predictions for 2025 – RISC-V InternationalRISC-V Microcontroller Lights Up Synth With LED Level Meter
HighTec compiler supports Nuclei RISC-V CPU core
SpacemiT Develops Server CPU Chip V100 for Next-Gen AI Applications
[VIDEO] OpenHW Foundation RISC-V Cores: Empowering the Hardware Revolution for SDVIn this talk, Flo Wohlrab dives deep into the growing impact of industrial-grade, open-source RISC-V cores in the automotive industry, with a spotlight on the…
Canonical Adds the Orange Pi RV2 to Its List of Officially-Supported Ubuntu-Capable RISC-V BoardsCanonical has announced it is adding yet another RISC-V single-board computer to its build list for official Ubuntu Linux operating system images: the recently-released Orange…
Podcast EP282: An Overview of Andes Focus on RISC-V and the Upcoming RISC-V CONDan is joined by Marc Evans, director of business development and technology at Andes. Marc has over twenty years of experience in the use of…
Ubuntu developer images now available for OrangePi RV2: a low-cost RISC-V SBCCanonical, the publisher of Ubuntu, is excited to announce the availability of Ubuntu developer images for the new OrangePi RV2 RISC-V single board computer (SBC). We’re delighted…
Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries (Vectorization)By Zhanheng Yang, Alibaba DAMO Academy 1. Introduction In the previous article of the XuanTie Optimized Computing Libraries series, we provided a systematic overview of…
RISC-V Powered Executive M.Tech VLSI PG Program for Next-Gen Chip DesignersMaven Silicon has collaborated with PES University and launched a unique Executive MTech in VLSI Design, Blended Weekend Classroom Degree Program for working professionals in India. This advanced…
A 32-bit RISC-V processor made using molybdenum disulfide instead of siliconA team of engineers at Fudan University has successfully designed, built and run a 32-bit RISC-V microprocessor that uses molybdenum disulfide instead of silicon as…
[VIDEO] Canonical x Rivos: Delivering scalable RISC-V solutions in Data CentersRivos and Canonical have partnered to enhance RISC-V-readiness in Ubuntu for Data Centers, creating a streamlined and optimized Linux experience, specifically designed for Rivos platforms.…
Frontgrade Gaisler Launches New GRAIN Line and Wins SNSA Contract to Commercialize First Energy-Efficient Neuromorphic AI for Space ApplicationsGothenburg, Sweden (April 2, 2025) – The Swedish National Space Agency (SNSA) has awarded Frontgrade Gaisler, a leading provider of radiation-hardened microprocessors for space missions, a contract…
2025 RISC-V CON: Andes Technology Celebrates 20 Years, Bringing Together Innovators, Engineers, and Ecosystem LeadersSan Jose, CA, April 02, 2025 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier…
Frontgrade Gaisler to commercialise neuromorphic AI for spaceThe Swedish National Space Agency (SNSA) has awarded Frontgrade Gaisler, a leading provider of radiation-hardened microprocessors for space missions, a contract to commercialise the first…
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RISC-V: An Open Standard – Backed by a Global Community – to Enable Open Computing for AllThe entire tech ecosystem benefits from standards being open, whether it’s RISC-V or other popular standards such Ethernet, HTTPS, JPEG, or USB. Three key reasons…
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingBy: Dario Sassi Thober, thober@vonbraunlabs.com.br & Rafael Vidal Aroca, aroca@vonbraunlabs.com.br São Paulo, September 26th, 2023 Today’s global landscape is saturated with access control systems. Acura, part of…
It’s not just about the core, it’s also about the systemBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager As more companies design new many-core architectures to gain an advantage over competitors,…
How to Design a RISC-V Space MicroprocessorIntroduction In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Whether exploring the depths of…
DeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsROMA, the world's first native RISC-V powered laptop from DeepComputing, has been shipped to domestic customers and also been arranged for international logistics shipments to…
Introducing the RISC-V Board of Directors Elected OfficersBy: Calista Redmond | CEO, RISC-V International The past few years have seen a meteoric rise of RISC-V globally. In eight short years, RISC-V International…
RISC-V co-design using trace-based simulation with Renode and TBMThe design of modern hardware components such as processors and accelerators is a multidisciplinary effort at the intersection of hardware and software development. Hardware-software co-design…
RISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverBy PerfXLab Introduction PerfXLab was founded in 2016. Our core team is from Chinese Academy of Sciences. We dedicate to the research and development of…
Debugging a RISC-V processor requires integrated hardware and software toolsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager To debug a RISC-V processor that comprises tens or hundreds of cores and…
Cloud-V: Accelerating RISC-V Software Development with 10xEngineersThe momentum that RISC-V is seeing across the compute spectrum is undeniable. As we saw at the RISC-V Summit and Summit Europe, RISC-V based computing…
Oral History of Mark Himelstein | CTO of RISC-V InternationalMark grew up in Pennsylvania and took a somewhat circuitous path to earning a BS in Math and Computer Science at Wilkes University in 1981.…
Cool PolarFire® SoC FPGA Based System On Modules by ARIES EmbeddedField Programmable Gate Arrays (FPGAs) are known for their flexibility and reconfigurability, making them suitable for a wide range of applications. However, they are also…
No recent posts listed
RISC-V: An Open Standard – Backed by a Global Community – to Enable Open Computing for AllThe entire tech ecosystem benefits from standards being open, whether it’s RISC-V or other popular standards such Ethernet, HTTPS, JPEG, or USB. Three key reasons…
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingBy: Dario Sassi Thober, thober@vonbraunlabs.com.br & Rafael Vidal Aroca, aroca@vonbraunlabs.com.br São Paulo, September 26th, 2023 Today’s global landscape is saturated with access control systems. Acura, part of…
It’s not just about the core, it’s also about the systemBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager As more companies design new many-core architectures to gain an advantage over competitors,…
How to Design a RISC-V Space MicroprocessorIntroduction In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Whether exploring the depths of…
DeepComputing Has Made Great Processes in New Hardware Devices and Software SolutionsROMA, the world's first native RISC-V powered laptop from DeepComputing, has been shipped to domestic customers and also been arranged for international logistics shipments to…
Introducing the RISC-V Board of Directors Elected OfficersBy: Calista Redmond | CEO, RISC-V International The past few years have seen a meteoric rise of RISC-V globally. In eight short years, RISC-V International…
RISC-V co-design using trace-based simulation with Renode and TBMThe design of modern hardware components such as processors and accelerators is a multidisciplinary effort at the intersection of hardware and software development. Hardware-software co-design…
RISC-V Public Beta Platform Release · Database Adaptation Evaluation On RISC-V serverBy PerfXLab Introduction PerfXLab was founded in 2016. Our core team is from Chinese Academy of Sciences. We dedicate to the research and development of…
Debugging a RISC-V processor requires integrated hardware and software toolsBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager To debug a RISC-V processor that comprises tens or hundreds of cores and…
Cloud-V: Accelerating RISC-V Software Development with 10xEngineersThe momentum that RISC-V is seeing across the compute spectrum is undeniable. As we saw at the RISC-V Summit and Summit Europe, RISC-V based computing…
Oral History of Mark Himelstein | CTO of RISC-V InternationalMark grew up in Pennsylvania and took a somewhat circuitous path to earning a BS in Math and Computer Science at Wilkes University in 1981.…
Cool PolarFire® SoC FPGA Based System On Modules by ARIES EmbeddedField Programmable Gate Arrays (FPGAs) are known for their flexibility and reconfigurability, making them suitable for a wide range of applications. However, they are also…
Groundbreaking Formal Verification Further Enhances the Quality of CHERIoT-IbexCollaboration milestone addresses key pain points of typical design verification (DV) approaches, improving confidence while reducing cost, time, and resource spend CAMBRIDGE, England – 10th February, 2025 – lowRISC C.I.C.,…
First RISC-V mainboard for modular laptopA RISC-V processor board is available for the first time for the modular Framework laptop as a development system. The DC-Roma mainboard from DeepComputing can…
VyperCore launches VyperLab, an evaluation platform to showcase its innovative compute accelerator technologyCambridge, United Kingdom – 11 February 2025 – VyperCore, the pioneering high performance processor company, has launched VyperLab, a new cloud-based evaluation platform for its groundbreaking…
Nvidia RTX 5090 Graphics Card Review — Get Neural Or Get Left BehindWhen Nvidia first announced the RTX 5000 series of graphics cards at CES 2025, it was clear that the company would be leaning even further…
Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional SafetyHSINCHU, TAIWAN, Jan. 23, 2025 (GLOBE NEWSWIRE) -- Andes Technology, a leading provider of RISC-V processor cores, today announced that its D45-SE processor has successfully…
Tiny RISC-V chip for the digital product passport (DPP)The RISC-V microcontroller NXP EdgeLock A30 is an "authenticator" that stores digital information and protects it from unauthorized modification. Among other things, the A30 is…
A Complete Overview of RISC-V Open ISA for Your Quick ReferenceIn this video, our Founder and CEO, Mr. P R Sivakumar , explains the layered architecture of the RISC-V open ISA and how chip designers design various…
Support added in RISC-V IP for automotive high safety and security applicationsHighTec EDV-Systeme GmbH has added support for Nuclei System Technology's RISC-V CPU IP. Its automotive-grade LLVM open-source-based C/C++ compiler tools are safety-qualified according to ISO…
EDACafe Industry Predictions for 2025 – RISC-V InternationalAndrea Gallo 2024 was a very accomplished year for RISC-V International as we ratified 25 new specifications ranging from performance analysis and improvement to…
RISC-V Microcontroller Lights Up Synth With LED Level MeterThe LM3914 LED bar graph driver was an amazing chip back in the day. Along with the LM3915, its logarithmic cousin, these chips gave a…
HighTec compiler supports Nuclei RISC-V CPU coreHighTec EDV-Systeme has added support for Nuclei System Technology’s RISC-V CPU IP to its automotive-grade LLVM open-source-based C/C++ compiler. The tools are safety-qualified according to…
SpacemiT Develops Server CPU Chip V100 for Next-Gen AI ApplicationsSpacemiT, a RISC-V AI CPU company based in China, has announced significant advancements in its development of the SpacemiT Vital Stone® V100 server CPU chip, which now offers a comprehensive…