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RISC-V Application to Machine Language | Maven Silicon

RISC-V Application to Machine Language March 17, 2021 Sivakumar P R This video explains how a RISC-V processor executes all the software applications written in the…

Open Source Leader Shares the Importance of Knowing and Embracing Your Strengths with Executive Kim McMahon | The Digital Executive

RISC-V International's Director of Visibility & Community Engagement, Kim McMahon, joins Coruzant Technologies for the Digital Executive podcast. She shares that you have to really…

RISC-V Star Rises Among Chip Developers Worldwide | Jeremy Hsu, IEEE Spectrum

The upstart RISC-V chip architecture has found international traction with its customizable open-source design and lack of licensing fees Read the full article.

Efinix® Announces Expansion of High-Performance Titanium FPGA Product Line | Press Release

Titanium Product Line Expands to 1M Logic Elements SANTA CLARA, Calif.--(BUSINESS WIRE)--Efinix®, an innovator in programmable product platforms and technology, today announced the expansion of…

Get Ready for the Most Interesting CPU Market We’ve Seen in Decades | Joel Hruska , Extreme Tech

For most of the last 2.5 decades, the PC CPU industry has been dominated by a single architecture: x86. While the 1990s opened with a…

Week In Review: Design, Low Power | Jessee Allen, Semiconductor Engineering

Standards CHIPS Alliance and RISC-V International will work jointly to update the OmniXtend Cache Coherency specification. The two groups formed a new OmniXtend working group…

DARPA adds RISC-V to its Toolbox: Defense researchers can get special access to SiFive chip designs | Katyanna Quach

Engineers and scientists working on American military research programs can now access RISC-V processor core designs and associated blueprints through DARPA's Toolbox, and use the…

An Ultra-Low Power RISC-V Chip and a Clever Neural Network Give This Crazyflie “Top-Notch” Autonomy | Gareth Halfacree

GAP8 "Parallel Ultra-Low Power" chip draws just 86mW to drive a 135 frames-per-second autonomous flight system with pose estimation. Read the full article.

RISC-V Extension Boasts Dramatic Improvements in Ultra-Low Power IoT Wireless Signal Processing | Gareth Halfacree

Extensions to the open source ISA offer "substantial energy savings" for common IoT protocols including LoRa and Bluetooth Low Energy. Read the full article.

Axiomise Unveils Formal Verification 101 Training Program | GlobeNewsWire

LONDON, April 06, 2021 (GLOBE NEWSWIRE) -- Axiomise, the leading provider of cutting-edge formal verification consulting, training, services, and IP, today unveiled a comprehensive introductory certification-based…

Axiomise Unveils Formal Verification 101 Training Program | Press Release

Certification-Based Self-Paced On-Demand Continuing Education Program Includes Best Practices for Using Formal Verification LONDON, April 06, 2021 (GLOBE NEWSWIRE) -- Axiomise, the leading provider of cutting-edge…

Video: #CSWSpring21 / RISC-V for acceleration of data-parallel workloads: from IoT to HPC

In this talk by Luca Benini (University of Bologna / ETH Zurich), we will look into RISC-V based architectures for acceleration of data-parallel workloads. The…

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RISC-V Deep Dive, CTO Interview | Dan Olds, Radio Free HPC

More on the podcast and to listen.]]>