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Canonical Enables Ubuntu on Microchip’s PolarFire® SoC FPGA

Canonical published the optimized Ubuntu release for the first RISC-V based System-on-Chip (SoC) field-programmable gate array (FPGA)—our PolarFire® SoC FPGA Icicle Kit, expanding support for…

Catch up with the best of the RISC-V booth from Embedded World 2023

Embedded World 2023 showed great momentum for RISC-V. Across the show, our members were demonstrating new technologies and developing new relationships, bringing RISC-V to a…

Top Ten Fallacies About RISC-V

David Patterson, Pardee Professor of Computer Science, Emeritus at UC Berkeley and Vice Chair of the RISC-V International Board of Directors Following the Fallacies and…

Tiempo Secure brings additional security features to the RISC-V ecosystem

The IoT world is especially exposed to cyberattacks. As of now, industry leaders are demonstrating the interest of Secure Elements and Secure Enclaves for reaching…

The Evolving Automotive Experience Made Possible by RISC-V

By Desi Banatao CEO, MIPS   Over the last 50 years, we’ve seen incredible changes in the automotive industry. Who would have thought that our…

Ashling and Imagination announce Ashling’s RiscFree™ C/C++ SDK support for RISC-V-based Catapult family.

Embedded World, Mar-14 2023, Nuremberg, Germany. Ashling and Imagination Technologies announced today that Ashling’s RiscFree SDK will provide software development  support for Imagination’s Catapult RISC-V-based…

Why we’ve levelled up on RISC-V

Author: Shreyas Derashri  There’s no question that disruption is coming to the CPU industry. RISC-V is here to provide an open-source alternative to proprietary CPU…

MachineWare at Embedded World 2023

At Embedded World 2023 MachineWare presents SIM-V, an ultra-fast, SystemC TLM based, parallel-enabled, RISC-V instruction set simulator for early embedded software development and verification. SIM-V…

Empowering RISC-V with open source innovation from Ubuntu

We are proud to join RISC-V at Embedded World again in 2023! Our team will demo Ubuntu on RISC-V boards as well as demonstrate the…

First Xuantie Partner Conference in China Highlights Growth Momentum of Thriving RISC-V Community

The first Xuantie Partner Conference, organized by Alibaba Group’s chip development business, T-Head, took place in Shanghai, China last week. It marks another major milestone…

What to see at Embedded World 2023

RISC-V is leading the inevitable era of open computing at Embedded World 2023 in Nuremberg from March 14-16, as we bring the community together to…

RISC-V Webinar with Andes and Imperas: “RISC-V Design Innovations with Custom Extensions.”

On Thursday, Feb. 23rd, Andes and Imperas held a webinar on "RISC-V Design Innovations with Custom Extensions." At the end of the formal remarks, the…

No recent posts listed
Porting GNOME OS to Microchip’s PolarFire® SoC FPGA Icicle Kit for the First Time | Microchip

Customers often require support to bring up new boards and architectures on Linux. Our Mi-V ecosystem partner, Codethink’s specialty is board bring-up and they perform…

Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro

The landscape of Machine Learning software libraries and models is evolving rapidly, and to satisfy the ever-increasing demand for memory and compute while managing latency,…

Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto Technologies Inc

Machine learning (ML) recommendation workloads have demanding performance and memory requirements and, to date, have largely been run on servers with x86 processors. To accelerate…

RISC-V Compressed Instructions for SERV | Abdul Wadood, LFX Mentorship at RISC-V International

In Spring 2022, various mentorship projects were offered by RISC-V International on the LFX platform of the Linux Foundation. I got selected for one of…

Everything RISC-V at the Design Automation Conference! | RISC-V International

The Design Automation Conference is here and we're thrilled to share look at all the RISC-V happenings during the show. If you are interested in…

Progress in Porting Android onto RISC-V: Android 12 upgrade, vendor modules and TensorFlow Lite | Mao Han, Alibaba Cloud

Last year Alibaba T-Head reported that the basic features of Android had been ported onto RISC-V-based Xuantie cores. Since then more effort has been spent…

PolarFire® SoC FPGA in Conclusive RCHD-PF System Module | Microchip

Operational Technology (OT) and Transportation and Industrial Control Systems (ICS) are often forced to make concessions regarding security and updates to deliver critical functionality without…

DeepComputing and Xcalibyte Open Pre-Orders for First Native RISC-V Development Laptop; Quantities Limited | Xcalibyte and Deep Computing

ROMA development platform features forthcoming quad-core RISC-V processor for fastest, seamless RISC-V software development experience. DeepComputing and Xcalibyte today opened pre-orders for the industry’s first…

SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore

YADRO and Syntacore hosted the first ever engineering hackathon for students in Russia. The event was organized in association with National Research University of Electronic…

Democratizing Chiplet-Based Processor Design | Ventana Micro Systems

By Bob Wheeler, Principal Analyst, The Linley Group Chiplet-based designs promise reduced development costs and faster time to market, but they’ve  been exclusive to large…

RISC-V Vector Processing is Taking Off | SiFive

The RISC-V Vector Extension (RVV) Version 1.0 was ratified by RISC-V International in 2021. Since this public debut, there has been growing excitement about vector…

GreenWaves will Demonstrate Live the Ground-breaking AI and DSP Demos on its Ultra Low Power Chip at Embedded World 2022 | GreenWaves Technologies

Located in the micro-and nano-electronics hotspot of Grenoble, GreenWaves is a fabless semiconductor startup that designs and brings to market advanced ultra-low-power AI and DSP…

Porting GNOME OS to Microchip’s PolarFire® SoC FPGA Icicle Kit for the First Time | Microchip

Customers often require support to bring up new boards and architectures on Linux. Our Mi-V ecosystem partner, Codethink’s specialty is board bring-up and they perform…

Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research | Antmicro

The landscape of Machine Learning software libraries and models is evolving rapidly, and to satisfy the ever-increasing demand for memory and compute while managing latency,…

Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto Technologies Inc

Machine learning (ML) recommendation workloads have demanding performance and memory requirements and, to date, have largely been run on servers with x86 processors. To accelerate…

RISC-V Compressed Instructions for SERV | Abdul Wadood, LFX Mentorship at RISC-V International

In Spring 2022, various mentorship projects were offered by RISC-V International on the LFX platform of the Linux Foundation. I got selected for one of…

Everything RISC-V at the Design Automation Conference! | RISC-V International

The Design Automation Conference is here and we're thrilled to share look at all the RISC-V happenings during the show. If you are interested in…

Progress in Porting Android onto RISC-V: Android 12 upgrade, vendor modules and TensorFlow Lite | Mao Han, Alibaba Cloud

Last year Alibaba T-Head reported that the basic features of Android had been ported onto RISC-V-based Xuantie cores. Since then more effort has been spent…

PolarFire® SoC FPGA in Conclusive RCHD-PF System Module | Microchip

Operational Technology (OT) and Transportation and Industrial Control Systems (ICS) are often forced to make concessions regarding security and updates to deliver critical functionality without…

DeepComputing and Xcalibyte Open Pre-Orders for First Native RISC-V Development Laptop; Quantities Limited | Xcalibyte and Deep Computing

ROMA development platform features forthcoming quad-core RISC-V processor for fastest, seamless RISC-V software development experience. DeepComputing and Xcalibyte today opened pre-orders for the industry’s first…

SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore

YADRO and Syntacore hosted the first ever engineering hackathon for students in Russia. The event was organized in association with National Research University of Electronic…

Democratizing Chiplet-Based Processor Design | Ventana Micro Systems

By Bob Wheeler, Principal Analyst, The Linley Group Chiplet-based designs promise reduced development costs and faster time to market, but they’ve  been exclusive to large…

RISC-V Vector Processing is Taking Off | SiFive

The RISC-V Vector Extension (RVV) Version 1.0 was ratified by RISC-V International in 2021. Since this public debut, there has been growing excitement about vector…

GreenWaves will Demonstrate Live the Ground-breaking AI and DSP Demos on its Ultra Low Power Chip at Embedded World 2022 | GreenWaves Technologies

Located in the micro-and nano-electronics hotspot of Grenoble, GreenWaves is a fabless semiconductor startup that designs and brings to market advanced ultra-low-power AI and DSP…