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Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power
Enabling RISC-V & AI Innovations with Andes AX45MPV Running Live on S2C Prodigy S8-100 Prototyping System
Maven Silicon is now an Approved Training Partner of Altera’s Solution Acceleration Partner (ASAP) Program
AI-Powered PCB Inspection: Defect Detection in Real Time with Microchip PolarFire® SoC FPGA and SpanIdea AI Technology
Working With the Microchip PolarFire® SoC FPGA Using SEGGER Development Tools and Debug Probes
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography
Yocto Project Welcomes RISC-V International as New Platinum Member, Expands Global Ecosystem and Leads with Cyber Resilience Act Preparedness
OniO raises €5m to ramp up ultra low power RISC-V microcontroller production
Indian RISC-V Startup Slashes Design Time to Minutes
The Rise of RISC-V
MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and Automotive
Former Intel engineers form AheadComputing to break CPU performance limits with RISC-V design
Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI application
Accelerate RISC-V Verification Using Synopsys Cloud
RISC-V Summit Europe is Underway with 700+ Attendees Representing 40 CountriesAI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit InternationalRISC-V in Brazil: Leading the Open Compute Era in Latin America
HPC on RISC-V a hot topic at the International Supercomputing Conference, Hamburg
My Top 10 Reasons to Attend RISC-V Summit EuropeDesigning with RISC-V Using ChipInventorRISC-V Summit China 2024: Details Now Available on Call for Proposals and SponsorshipsSeeking Sponsors for RISC-V Day Tokyo 2024!UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry
Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI applicationAccelerate RISC-V Verification Using Synopsys CloudRISC-V Summit Europe is Underway with 700+ Attendees Representing 40 CountriesAI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit InternationalRISC-V in Brazil: Leading the Open Compute Era in Latin AmericaHPC on RISC-V a hot topic at the International Supercomputing Conference, HamburgMy Top 10 Reasons to Attend RISC-V Summit EuropeDesigning with RISC-V Using ChipInventorRISC-V Summit China 2024: Details Now Available on Call for Proposals and SponsorshipsSeeking Sponsors for RISC-V Day Tokyo 2024!UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry
Codasip: Toward Custom, Safe, Secure RISC-V Compute Cores
Semidynamics: From RISC-V with AI to AI with RISC-V
Parallel AI RISC-V compiler enters alpha testing
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V Platforms
SiFive Partners with Kinara to Put Two RISC-V Cores and 40 TOPS of Ara-2 Compute on a USB Stick
Andrea Gallo Named CEO of RISC-V International
China Initiates Development of RISC-V Talent Training Specifications
RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
Quintauris and SEGGER Collaborate on RISC-V Development
50 TOPS DC-ROMA RISC-V AI PC is Here!
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V Platforms
Codasip platform accelerates CHERI adoption
Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V PowerImagine a rocket, meticulously engineered for efficiency, speed and reliability, ready to launch into the vast expanse of space. The Mi-V RV32 v4.0 soft RISC-V…
Enabling RISC-V & AI Innovations with Andes AX45MPV Running Live on S2C Prodigy S8-100 Prototyping SystemQualifying an AI-class RISC-V SoC demands proving that wide vectors, deep caches, and high-speed I/O operate flawlessly long before tape-out. At the recent Andes RISC-V…
Maven Silicon is now an Approved Training Partner of Altera’s Solution Acceleration Partner (ASAP) ProgramMaven Silicon is now an Approved Training Partner of Altera’s Solution Acceleration Partner (ASAP) Program! Through this powerful collaboration, our learners will gain hands-on experience…
AI-Powered PCB Inspection: Defect Detection in Real Time with Microchip PolarFire® SoC FPGA and SpanIdea AI TechnologyElectronics manufacturers and engineers can now eliminate the inefficiencies of manual PCB quality inspections. Leveraging AI-powered image processing on the Microchip PolarFire® SoC Video Kit and…
Working With the Microchip PolarFire® SoC FPGA Using SEGGER Development Tools and Debug ProbesThe PolarFire® SoC family offers the industry's first RISC-V based System-on-Chip Field-Programmable Gate Arrays (SoC FPGAs), delivering a combination of low power consumption, thermal efficiency and…
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based CryptographyProject Snapshot Post-quantum cryptography (PQC) has garnered significant attention across various communities, particularly with the National Institute of Standards and Technology (NIST) advancing to the…
Yocto Project Welcomes RISC-V International as New Platinum Member, Expands Global Ecosystem and Leads with Cyber Resilience Act PreparednessDENVER – Open Source Summit North America – June 23, 2025 – The Yocto Project, an open source collaboration project that helps developers create custom Linux-based systems…
OniO raises €5m to ramp up ultra low power RISC-V microcontroller productionNorwegian chip design OniO has raised €5m to ramp up production of its ultra low power RISC-V microcontroller. ONiO.zero is the first general-purpose microcontroller that…
Indian RISC-V Startup Slashes Design Time to MinutesIndian fabless startup InCore Semiconductors has unveiled its SoC Generator platform, a deterministic automation tool that compresses the time to design a fully functional SoC…
The Rise of RISC-VeeNews Europe Interview with Krste Asanovic about the benefits of RISC-V OpenISA It was in the summer of 2010 that Krste and a group of…
MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and AutomotiveSan Jose, CA & Hyderabad, India- June 12, 2025: Cyient Semiconductors Private Limited, a fast-growing custom silicon company based in Hyderabad, and MIPS, a global leader…
Former Intel engineers form AheadComputing to break CPU performance limits with RISC-V designWhat just happened? In the heart of Oregon's Silicon Forest, a group of veteran chip architects has traded the security of a tech giant for the…
Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI applicationBy Makeljana Shkurti, SES VRULL, a company headquartered in Austria that provides consulting services and outsourced R&D to semiconductor companies, is entering a strategic partnership…
Accelerate RISC-V Verification Using Synopsys CloudRISC-V is an emerging choice for semiconductor companies to create highly differentiated products for a wide range of end applications. Both established players and start-up…
RISC-V Summit Europe is Underway with 700+ Attendees Representing 40 CountriesThis year’s RISC-V Summit Europe, taking place in Munich, Germany from Monday, June 24 – Friday, June 28, has already welcomed more than 700 attendees…
AI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit InternationalIn recognition of International Women in Engineering Day on June 23, we want to shine the spotlight on some of the outstanding women in the…
RISC-V in Brazil: Leading the Open Compute Era in Latin AmericaOn June 14th, 2024, the Eldorado Research Institute in Campinas, São Paulo, hosted the RISC-V Brazil event. This gathering brought together over 200 professionals, researchers,…
HPC on RISC-V a hot topic at the International Supercomputing Conference, HamburgBy Nick Brown, Senior Research Fellow at EPCC, University of Edinburgh May the 13th saw the commencement of the 39th International Supercomputing Conference (ISC)…
My Top 10 Reasons to Attend RISC-V Summit EuropeBy Tiffany Sparks, Vice President, Marketing, RISC-V International Like so many others, I am looking forward to summer travel, and I am certainly excited…
Designing with RISC-V Using ChipInventorSunnyvale, June 6th, 2024 Revolutionizing Chip Design with RISC-V ChipInventor has successfully been used to design and tape out RISC-V cores, transforming ideas into FPGA…
RISC-V Summit China 2024: Details Now Available on Call for Proposals and SponsorshipsRISC-V Summit China 2024: Details Now Available on Call forProposals and Sponsorships The 4th RISC-V Summit China will be held from August 19 to 25,…
Seeking Sponsors for RISC-V Day Tokyo 2024!Join us at RISC-V Day Tokyo 2024 on August 1 at the University of Tokyo's Ito International Academic Research Center. We’re looking for sponsors to…
UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.Author: Gerard Vink INTRODUCTION TASKING, a leading provider of innovative compiler solutions for the automotive functional safety sector, has introduced a compiler toolset for the…
Keynote: Charting the AI-Powered Transformation in the Semiconductor IndustryBy Sivakumar P R, Founder & CEO, Maven Silicon In this keynote, ‘Charting the AI-Powered Transformation in the Semiconductor Industry’ at the 37th International VLSI…
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Stream Computing partners with VRULL and Software Ecosystems Solutions to build a richer software ecosystem for RISC-V AI applicationBy Makeljana Shkurti, SES VRULL, a company headquartered in Austria that provides consulting services and outsourced R&D to semiconductor companies, is entering a strategic partnership…
Accelerate RISC-V Verification Using Synopsys CloudRISC-V is an emerging choice for semiconductor companies to create highly differentiated products for a wide range of end applications. Both established players and start-up…
RISC-V Summit Europe is Underway with 700+ Attendees Representing 40 CountriesThis year’s RISC-V Summit Europe, taking place in Munich, Germany from Monday, June 24 – Friday, June 28, has already welcomed more than 700 attendees…
AI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit InternationalIn recognition of International Women in Engineering Day on June 23, we want to shine the spotlight on some of the outstanding women in the…
RISC-V in Brazil: Leading the Open Compute Era in Latin AmericaOn June 14th, 2024, the Eldorado Research Institute in Campinas, São Paulo, hosted the RISC-V Brazil event. This gathering brought together over 200 professionals, researchers,…
HPC on RISC-V a hot topic at the International Supercomputing Conference, HamburgBy Nick Brown, Senior Research Fellow at EPCC, University of Edinburgh May the 13th saw the commencement of the 39th International Supercomputing Conference (ISC)…
My Top 10 Reasons to Attend RISC-V Summit EuropeBy Tiffany Sparks, Vice President, Marketing, RISC-V International Like so many others, I am looking forward to summer travel, and I am certainly excited…
Designing with RISC-V Using ChipInventorSunnyvale, June 6th, 2024 Revolutionizing Chip Design with RISC-V ChipInventor has successfully been used to design and tape out RISC-V cores, transforming ideas into FPGA…
RISC-V Summit China 2024: Details Now Available on Call for Proposals and SponsorshipsRISC-V Summit China 2024: Details Now Available on Call forProposals and Sponsorships The 4th RISC-V Summit China will be held from August 19 to 25,…
Seeking Sponsors for RISC-V Day Tokyo 2024!Join us at RISC-V Day Tokyo 2024 on August 1 at the University of Tokyo's Ito International Academic Research Center. We’re looking for sponsors to…
UNVEILING THE TASKING RISC-V COMPILER | A Breakthrough regarding the development of FuSa and Cybersecurity compliant Software.Author: Gerard Vink INTRODUCTION TASKING, a leading provider of innovative compiler solutions for the automotive functional safety sector, has introduced a compiler toolset for the…
Keynote: Charting the AI-Powered Transformation in the Semiconductor IndustryBy Sivakumar P R, Founder & CEO, Maven Silicon In this keynote, ‘Charting the AI-Powered Transformation in the Semiconductor Industry’ at the 37th International VLSI…
Codasip: Toward Custom, Safe, Secure RISC-V Compute CoresIn a keynote speech at the RISC-V Summit Europe 2025 in Paris, Emmanuel Till-Vattier, VP of sales EMEA at Codasip, presented a brief product update,…
Semidynamics: From RISC-V with AI to AI with RISC-VIn just two years, Semidynamics has “evolved from RISC-V with AI to AI with RISC-V”, Semidynamics’ chief sales officer Volker Politz said at this week’s…
Parallel AI RISC-V compiler enters alpha testingFlow Computing in Finland has started alpha testing of a RISC-V compiler for its Parallel Processing Unit (PPU) AI block. The PPU is capable of…
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V PlatformsLaguna Hills, California. BrainChip Holdings Ltd released information it is now integrating Andes Technology’s RISC-V cores with its NPUs. According to the press release, the companies will exhibit BrainChip’s…
SiFive Partners with Kinara to Put Two RISC-V Cores and 40 TOPS of Ara-2 Compute on a USB StickRISC-V pioneer SiFive has announced a partnership with energy-efficient edge artificial intelligence (edge AI) specialist Kinara to launch a USB gadget designed to provide developers…
Andrea Gallo Named CEO of RISC-V InternationalRISC-V International has appointed Andrea Gallo as CEO, effective immediately. Previously vice president of Technology at the organization, Gallo brings extensive experience in open ecosystems…
China Initiates Development of RISC-V Talent Training SpecificationsBeijing, April 16, 2025 — The RISC-V Talent Training Specification Workshop, organized by the Beijing Institute of Open Source Chip (BOSC) was convened. The workshop…
RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027At last month’s Andes Technology RISC-V Con event in San Jose, CA, the company announced a number of partnerships with companies like Imagination Technologies, Baya…
Quintauris and SEGGER Collaborate on RISC-V DevelopmentMay 9, 2025 — SEGGER has announced a partnership with Quintauris to support the growing RISC-V ecosystem through new development tools and hardware for automotive, industrial, and IoT markets.…
50 TOPS DC-ROMA RISC-V AI PC is Here!DeepComputing, in collaboration with Framework and powered by ESWIN Computing’s advanced RISC-V multi-purpose intelligent computing SoC EIC7702X—featuring 8 SiFive’s high-performance P550 CPU cores and pre-installed with Ubuntu Desktop 24.04 LTS— proudly announces the availability of the…
BrainChip and Andes Unite to Drive Edge AI Breakthroughs on RISC-V PlatformsLaguna Hills, California. BrainChip Holdings Ltd released information it is now integrating Andes Technology’s RISC-V cores with its NPUs. According to the press release, the companies will exhibit BrainChip’s…
Codasip platform accelerates CHERI adoptionCodasip Prime comprises pre-silicon hardware and software development kits to realise state-of-the-art memory-safe compute. The platform is based on the Codasip X730 application core, which…