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TetraMem Integrates Energy-Efficient In-Memory Computing with Andes RISC-V Vector ProcessorRivos Selects Andes NX45 for Control Functions in Upcoming High-Performance RISC-V SoC
Leveraging a Passion for Logic into a RISC-V Career
RISC-V International Newsletter – September 2024
Advancing AI the Brazilian Way: Fostering Innovation Through Collaboration and Open Standards
Hot Chips and Even Hotter Connections: RISC-V is Everywhere!
Trailblazers: Board of Directors Software Award Winners 2024
STMicroelectronics Joins Quintauris as Sixth Shareholder
Exploring the Amazing RISC-V Summit China 2024Introducing the Newly Elected RISC-V Board of Directors Officers and Members
RISC-V SoC Design Workshop by Maven Silicon in Malaysia & Singapore
RISC-V Summit North America T-Shirt Design Contest—And the Winner Is…!
Java 21 and 22 Now Available on RISC-V: A Collaboration Between RISE and Eclipse Adoptium
Empower Innovation with Numato Lab’s EagleCore™ PolarFire® SoC FPGA SOMMontaVista Software: Carrier Grade eXpress (CGX) 4.0 on Microchip PolarFire® SoC FPGA
Ensuring Integrity: The Role of SoC Security in Today’s Digital World
BRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPC
Advanced RISC-V Training Course | Maven Silicon – RISC-V Global Training PartnerIntroducing the RISC-V Enterprise Software Ecosystem Dashboard
Securing software execution with CHERI on a Codasip A730 RISC-V core
SiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 Certification
Adding Physical Memory Protection to the VeeR EL2 RISC-V Core
Spotlighting Women in the Global RISC-V Community this International Women’s Day
Soccer, Chips, RISC-V and Brazil
Java 21 and 22 Now Available on RISC-V: A Collaboration Between RISE and Eclipse AdoptiumEmpower Innovation with Numato Lab’s EagleCore™ PolarFire® SoC FPGA SOMMontaVista Software: Carrier Grade eXpress (CGX) 4.0 on Microchip PolarFire® SoC FPGAEnsuring Integrity: The Role of SoC Security in Today’s Digital WorldBRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPCAdvanced RISC-V Training Course | Maven Silicon – RISC-V Global Training PartnerIntroducing the RISC-V Enterprise Software Ecosystem DashboardSecuring software execution with CHERI on a Codasip A730 RISC-V coreSiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 CertificationAdding Physical Memory Protection to the VeeR EL2 RISC-V CoreSpotlighting Women in the Global RISC-V Community this International Women’s DaySoccer, Chips, RISC-V and Brazil
TetraMem Integrates Energy-Efficient In-Memory Computing with Andes RISC-V Vector ProcessorBy Wenbo Yin, Vice President of IC Design, TetraMem Inc. Introduction The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications…
Rivos Selects Andes NX45 for Control Functions in Upcoming High-Performance RISC-V SoCNX45 Becomes the Only RISC-V Core to Pass Rivos’ Rigorous Verification Process After Extensive Evaluation of Leading RISC-V Cores San Jose, CA – Sep. 11, 2024—…
Leveraging a Passion for Logic into a RISC-V CareerThe path to success for an IT career is often paved with curiosity, dedication and a willingness to evolve. Victor Labián Carro, RVFA, now a…
RISC-V International Newsletter – September 2024Message from RISC-V International The countdown is on! RISC-V Summit North America takes place on October 22-23 at the Santa Clara Convention Center. The Summit is…
Advancing AI the Brazilian Way: Fostering Innovation Through Collaboration and Open StandardsBrazil is making significant strides in developing artificial intelligence (AI) infrastructure, focusing primarily on High-Performance Computing (HPC), semiconductor technology, and large language models (LLMs). The…
Hot Chips and Even Hotter Connections: RISC-V is Everywhere!The weather might have been scorching, but the networking at Hot Chips was on fire! RISC-V was front and center, showcasing member boards, and fielding…
Trailblazers: Board of Directors Software Award Winners 2024Four software leaders were honored at RISC-V Summit Europe 2024 for their remarkable contributions to the RISC-V Community. Let’s celebrate their induction into the RISC-V…
STMicroelectronics Joins Quintauris as Sixth ShareholderThe semiconductor manufacturer is the latest organisation to join other industry players exploring the potential of RISC-V architecture Munich, Germany – August 29, 2024 –…
Exploring the Amazing RISC-V Summit China 2024By: The RISC-V Summit China Team The 4th RISC-V Summit China 2024 was successfully held in Hangzhou from August 21st to 23rd. This summit brought…
Introducing the Newly Elected RISC-V Board of Directors Officers and MembersThe RISC-V International Board of Directors and its officers are pivotal in guiding and leading the expansive RISC-V community. As members continue to make significant…
RISC-V SoC Design Workshop by Maven Silicon in Malaysia & SingaporeMaven Silicon’s Founder and CEO P R Sivakumar, and Principal Engineer Satish Putta are delivering a 3 days workshop on ‘RISC-V SoC Design’ in Malaysia…
RISC-V Summit North America T-Shirt Design Contest—And the Winner Is…!In a nod to the creativity and innovation of the RISC-V community, this year RISC-V International hosted the first RISC-V Summit North America T-shirt design…
Java 21 and 22 Now Available on RISC-V: A Collaboration Between RISE and Eclipse AdoptiumExciting news for developers and enthusiasts in the software development world! Java versions 21 and 22 are now officially supported on the RISC-V architecture, thanks…
Empower Innovation with Numato Lab’s EagleCore™ PolarFire® SoC FPGA SOMBy: Samuel M, Global Marketing Manager at Numato Lab Developers who have struggled with limited computing power will now be able to harness their full…
MontaVista Software: Carrier Grade eXpress (CGX) 4.0 on Microchip PolarFire® SoC FPGABy: Iisko Lappalainen, Director of Product Management and Solutions at MontaVista Software Companies who have struggled with finding a stable, secure and highly configurable platform…
Ensuring Integrity: The Role of SoC Security in Today’s Digital WorldBy: Rob Fisher In an era where our lives are increasingly reliant on digital technologies, the security of system-on-chip (SoC) devices has emerged as a…
BRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPCAn international collaboration will enable Brazil to develop RISC-V technologies to accelerate research and development in the areas of semiconductors and supercomputing in the country.…
Advanced RISC-V Training Course | Maven Silicon – RISC-V Global Training PartnerBy Sivakumar P R In this video, our Founder and CEO, Mr. P R Sivakumar, explains how he has authored the new RISC-V training course…
Introducing the RISC-V Enterprise Software Ecosystem DashboardAuthor: Isaac Chute, Director of Software Ecosystem, RISC-V International Historically there have been many iterations of compute platforms, such as Alpha, Vax, Solaris, PA-RISC, x86,…
Securing software execution with CHERI on a Codasip A730 RISC-V coreAuthor: Roddy Urquhart, Sr Technical Marketing Director, Codasip Introducing CHERI With cyber-attacks on systems growing in frequency and sophistication it is essential to improve the…
SiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 CertificationSecuring your vehicle used to mean remembering to lock your doors at night and hiding your belongings under the seat when parked in public lots.…
Adding Physical Memory Protection to the VeeR EL2 RISC-V CoreAntmicro’s work with CHIPS Alliance’s Caliptra Root of Trust project, led by Google, AMD, NVIDIA, and Microsoft focuses around providing automated testing and verification infrastructure…
Spotlighting Women in the Global RISC-V Community this International Women’s DayInternational Women's Day, celebrated annually on March 8, recognizes the remarkable achievements of women across the globe. It is an important day to acknowledge the…
Soccer, Chips, RISC-V and BrazilBrazil Joins RISC-V International as Premier Member In the realm of global sports, soccer stands unparalleled, symbolizing not just a game but a tapestry of…
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Java 21 and 22 Now Available on RISC-V: A Collaboration Between RISE and Eclipse AdoptiumExciting news for developers and enthusiasts in the software development world! Java versions 21 and 22 are now officially supported on the RISC-V architecture, thanks…
Empower Innovation with Numato Lab’s EagleCore™ PolarFire® SoC FPGA SOMBy: Samuel M, Global Marketing Manager at Numato Lab Developers who have struggled with limited computing power will now be able to harness their full…
MontaVista Software: Carrier Grade eXpress (CGX) 4.0 on Microchip PolarFire® SoC FPGABy: Iisko Lappalainen, Director of Product Management and Solutions at MontaVista Software Companies who have struggled with finding a stable, secure and highly configurable platform…
Ensuring Integrity: The Role of SoC Security in Today’s Digital WorldBy: Rob Fisher In an era where our lives are increasingly reliant on digital technologies, the security of system-on-chip (SoC) devices has emerged as a…
BRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPCAn international collaboration will enable Brazil to develop RISC-V technologies to accelerate research and development in the areas of semiconductors and supercomputing in the country.…
Advanced RISC-V Training Course | Maven Silicon – RISC-V Global Training PartnerBy Sivakumar P R In this video, our Founder and CEO, Mr. P R Sivakumar, explains how he has authored the new RISC-V training course…
Introducing the RISC-V Enterprise Software Ecosystem DashboardAuthor: Isaac Chute, Director of Software Ecosystem, RISC-V International Historically there have been many iterations of compute platforms, such as Alpha, Vax, Solaris, PA-RISC, x86,…
Securing software execution with CHERI on a Codasip A730 RISC-V coreAuthor: Roddy Urquhart, Sr Technical Marketing Director, Codasip Introducing CHERI With cyber-attacks on systems growing in frequency and sophistication it is essential to improve the…
SiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 CertificationSecuring your vehicle used to mean remembering to lock your doors at night and hiding your belongings under the seat when parked in public lots.…
Adding Physical Memory Protection to the VeeR EL2 RISC-V CoreAntmicro’s work with CHIPS Alliance’s Caliptra Root of Trust project, led by Google, AMD, NVIDIA, and Microsoft focuses around providing automated testing and verification infrastructure…
Spotlighting Women in the Global RISC-V Community this International Women’s DayInternational Women's Day, celebrated annually on March 8, recognizes the remarkable achievements of women across the globe. It is an important day to acknowledge the…
Soccer, Chips, RISC-V and BrazilBrazil Joins RISC-V International as Premier Member In the realm of global sports, soccer stands unparalleled, symbolizing not just a game but a tapestry of…