Blog

HaDes-V – Learning by Puzzling: A Modular Approach to RISC-V Processor Design Education Blog

HaDes-V – Learning by Puzzling: A Modular Approach to RISC-V Processor Design Education

Project Snapshot HaDes-V is an Open Educational Resource for learning microcontroller design. It guides through…

Camille CalichonMay 30, 2025

RISE RISC-V Developer Appreciation Program Blog

RISE RISC-V Developer Appreciation Program

Get paid to contribute to the RISC-V ecosystem!!

Austin BlackstoneMay 29, 2025

Certifying Embedded Applications Running on PolarFire® SoC FPGAs Blog

Certifying Embedded Applications Running on PolarFire® SoC FPGAs

By: Stephen Di Camillo, Technical Marketing and Business Development Manager Embedded system developers facing the…

anishaMay 15, 2025

Cost-Effective and Scalable: A Smarter Choice for RISC-V Development Blog

Cost-Effective and Scalable: A Smarter Choice for RISC-V Development

The RISC-V ecosystem is witnessing remarkable growth, driven by increasing industry adoption and a thriving…

anishaApril 15, 2025

Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries (Vectorization) Blog

Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries (Vectorization)

By Zhanheng Yang, Alibaba DAMO Academy 1. Introduction In the previous article of the XuanTie…

anishaApril 7, 2025

RISC-V Powered Executive M.Tech VLSI PG Program for Next-Gen Chip Designers Blog

RISC-V Powered Executive M.Tech VLSI PG Program for Next-Gen Chip Designers

Maven Silicon has collaborated with PES University and launched a unique Executive MTech in VLSI Design, Blended Weekend…

anishaApril 7, 2025

Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries Blog

Enhancing Commercial Software Adaptation with XuanTie Optimized Computing Libraries

By Yunfei Zhou, Alibaba DAMO Academy 1. Introduction The RISC-V architecture has matured over time.…

anishaMarch 28, 2025

RISC-V International at Embedded World, 11-13th March, Nuremberg Germany Blog

RISC-V International at Embedded World, 11-13th March, Nuremberg Germany

embedded world, the leading trade show covering hardware, software, tools, and related services for the…

anishaMarch 28, 2025

Simplifying Sail Simulations and Architectural Compatibility Testing Blog

Simplifying Sail Simulations and Architectural Compatibility Testing

Greg Sterling from RISC-V International has worked with Carl Perry to create a RISC-V development…

Camille CalichonMarch 24, 2025

CAST Provides a Functional Safety RISC-V Processor IP for the Microchip FPGA’s Blog

CAST Provides a Functional Safety RISC-V Processor IP for the Microchip FPGA’s

Build safety-critical automotive, aeronautic, space, and other systems with the Functional Safety RISC-V Processor IP…

anishaMarch 4, 2025

Building on a Legacy of Security: Introducing Polar-VPX BlogSecurity

Building on a Legacy of Security: Introducing Polar-VPX

SundanceDSP, a leading provider of high-performance FPGA-based solutions, is proud to announce the latest addition…

anishaMarch 4, 2025

Soft Tiling RISC-V Processor Clusters Speed Design and Reduce Risk BlogWhat's New

Soft Tiling RISC-V Processor Clusters Speed Design and Reduce Risk

By John Min    John Min is VP of Customer Success at Arteris. He possesses…

anishaMarch 1, 2025

How NVIDIA Shipped One Billion RISC-V Cores In 2024 Blog

How NVIDIA Shipped One Billion RISC-V Cores In 2024

At the recent RISC-V North America summit, NVIDIA’s Vice President of Multimedia Architecture, Frans Sijstermans…

anishaFebruary 25, 2025

RISC-V HPC excitement at Supercomputing 2024 sets up an unmissable ISC 2025 BlogHPC

RISC-V HPC excitement at Supercomputing 2024 sets up an unmissable ISC 2025

By: Nick Brown, EPCC High Performance Computing (HPC) is one of the most exciting and…

anishaFebruary 23, 2025

RISC-V at Embedded World 2025: Innovation, Networking & Must-See Sessions Blog

RISC-V at Embedded World 2025: Innovation, Networking & Must-See Sessions

The RISC-V Pavilion returns to embedded world for 2025!  Visit us in Hall 5, Stand…

anishaFebruary 23, 2025

TestRIG – Randomized Testing of RISC-V CPUs Blog

TestRIG – Randomized Testing of RISC-V CPUs

TestRIG (Testing with Random Instruction Generation) is a testing framework for RISC-V implementations. The RISC-V…

Camille CalichonFebruary 18, 2025

Accelerating RISC-V development with Tessent UltraSight-V BenchmarksBlogWhat's New

Accelerating RISC-V development with Tessent UltraSight-V

By: Francisca Tan, Product Management Lead – Tessent Embedded Analytics Siemens’ longstanding and deep engagement…

anishaJanuary 30, 2025

Towards an Integrated Matrix Extension: Workload Analysis of CNN Inference with QEMU TCG Plugings Blog

Towards an Integrated Matrix Extension: Workload Analysis of CNN Inference with QEMU TCG Plugings

Introduction  Following the gap analysis done in the second half of 2023, the Vector Special…

Camille CalichonJanuary 28, 2025

Chromium Performance Optimization on XuanTie RISC-V Processors BlogWhat's New

Chromium Performance Optimization on XuanTie RISC-V Processors

Yang Li, Alibaba DAMO Academy Chromium, the most widely adopted open-source browser engine, serves as…

anishaJanuary 8, 2025

Exploring RISC-V ISA Developments and Technical Highlights from 2024 BlogWhat's New

Exploring RISC-V ISA Developments and Technical Highlights from 2024

2024 has been a year of great technical progress for the RISC-V ISA. Our 75…

anishaDecember 20, 2024

RISC-V 2024: A Year of Global Growth and Innovation BlogWhat's New

RISC-V 2024: A Year of Global Growth and Innovation

As 2024 comes to a close, it’s clear that this has been a transformative year…

anishaDecember 19, 2024

S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC AIBlogHPCWhat's New

S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC

S2C Launches Prodigy S8-100 Series: 100M Gate FPGA Prototyping for AI and HPC December 19,…

anishaDecember 19, 2024

Longnail: Hardware Synthesis of CoreDSL Custom Instructions for MCU- and Application-Class Cores Blog

Longnail: Hardware Synthesis of CoreDSL Custom Instructions for MCU- and Application-Class Cores

Tammo Mürmann has just commenced his PhD studies at the Technical University of Darmstadt as…

Camille CalichonDecember 17, 2024

My Journey with the RISC-V Mentorship | Sailing Downstream II Blog

My Journey with the RISC-V Mentorship | Sailing Downstream II

by Linda Njau, RISC-V Mentee at Ventana Micro SystemsI came across the Linux/RISC-V mentorship while…

Camille CalichonDecember 17, 2024

XuanTie Co-Processor Interface Solution: A Bridge to Efficient Collaborative Computing BlogWhat's New

XuanTie Co-Processor Interface Solution: A Bridge to Efficient Collaborative Computing

Weitong Su, Alibaba DAMO Academy Co-processors are specialized units designed to assist the main processor…

anishaDecember 13, 2024