UNO Laboratories, Ltd. is collaborating with Hirosaki University on designing microarchitecture for embedded processors.
We’ve successfully designed high performance processor which operates 1 instruction in 1stage at 1 cycle on non-pipelined RISC-V FPGA using own patent “Central processing unit and microcontroller”.
The advantage of this processor is that there is no processing delay due to branch or interrupt instruction. As the result, we have demonstrated high-speed operation and low power consumption that exceeds the pipelined structure at the same frequency. Based on the achievements, we are currently working on a prototype ASIC chip.
We are going to try to achieve ultra-low-power microprocessors with non-pipelined RISC-V processor technology and we expect the technology could be used for the development of battery-maintenance-free IoT devices and LPWA.