Call for Proposals, Sponsorship Sales, and Attendee Registration Now Open Event Spans December 12th through…
RISC-V Community NewsJuly 29, 2022
Efficient Trace, Supervisor Binary Interface, Unified Extensible Firmware Interface, and Zmmul Multiply-Only Extension Accelerate Embedded- and Large-System Design. Six Additional Specifications Already In the Pipeline As Development Extends Into Vertical…
RISC-V welcomes Intel to the Board of Directors to collaborate on RISC-V IP and contribute…
Kim McMahonFebruary 7, 2022
ZURICH – Dec. 7, 2021 – RISC-V International, a global open hardware standards organization, today announced…
Kim McMahonDecember 7, 2021
With billions of chips in the market, RISC-V has seen widespread commercial adoption across industries…
Kim McMahonDecember 6, 2021
Ventana will continue to contribute and accelerate technical progress and market adoption of RISC-V ZURICH…
Kim McMahonDecember 6, 2021
RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V Designs
New Vector, Scalar Cryptography and Hypervisor specifications will help accelerate the adoption of RISC-V across…
Kim McMahonDecember 2, 2021
Founded in Collaboration with the CHIPS Alliance, OpenPOWER Foundation, and Western Digital, the Alliance is…
Kim McMahonSeptember 16, 2021
ZURICH and SAN FRANCISCO – July 28, 2021 – RISC-V International announced the 2021 RISC-V…
Kim McMahonJuly 28, 2021
SAN FRANCISCO, May 5, 2021 – Today, the seL4 Foundation and RISC-V International announced that…
Kim McMahonMay 5, 2021