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SiFive HiFive1 RevB

Organization: SiFive

HiFive1 Rev B Features and Specifications: Designed for IoT and edge computing, the FE310-G002 instantiates a SiFive Essential™ E3 Series CPU Core Complex, a high performance 32-bit RV32IMAC core. Additional features include a 16KB L1 Instruction Cache, a 16KB Data SRAM scratchpad, hardware multiply/divide, a debug module compatible with the RISC-V debug spec 0.13, flexible clock generation with on-chip oscillators and PLLs, and a wide variety of peripherals including UARTs, I2C QSPI, PWMs, and timers. Multiple power domains and a low-power standby mode ensure a wide variety of applications can benefit from the FE310. The USB debugger has been upgraded to SEGGER J-Link-OB, adding support for drag & drop flash programming as well as SEGGER JLink integration with SiFive Freedom Studio, an Eclipse based IDE. Freedom Studio is packaged with a prebuilt toolchain and example software projects. Alternatively, the SiFive Freedom Tools download package includes a pre-built toolchain, debugger, and additional command line tools that can be plugged into your own bespoke development environment. Microcontroller: FE310-G002, Digital I/O Pins: 19, PWM Pins: 9, SPI Controllers/HW CS Pins: 1/3, UART: 2, I2C: 1, Networking: WiFi/BT (off-chip), External Interrupt Pins: 19, External Wakeup Pins: 1, Flash Memory: 32 Mbit Off-Chip (ISSI SPI Flash), Host Interface (microUSB): Program, Debug, and Serial Communication, Debug: Segger J-Link, drag/drop code download, Weight: 22 g


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