Skip to main content

RISC-V Exchange

The RISC-V Exchange hosts the hardware, software, services, and learning offerings in the RISC-V community. Browse the list or search for an offering below.

Arabic course in Computer Architecture taught in RISC-V ISA

Organization: Umm Al-Qura University

An Arabic course in Computer Architecture taught in RISC-V ISA based on Computer Organization and Design the Hardware/Software Interface, RISC-V Edition, David Patterson and John Hennessy by Dr. Ghassan F. Bati. http://www.uqu.edu.sa/gfbati

License Type: Copyleft

Learn Language: Arabic

Learning

Building Applications with RISC-V and FreeRTOS (LFD112x)

This course is designed to provide the skills you need to build embedded systems with RTOS capabilities for real-time applications. Real time operating systems (RTOS) play an important role in any embedded system, enabling users to control the time critical functions required to be handled within specific timeframes for the effective use of those systems. FreeRTOS is an open source RTOS that has been used in various embedded systems and has been effectively ported onto various processors.

Learn Language: English

Learning

Deep Learning Inference on RISC-V with Movidius Neural Compute Stick

Organization: YADRO

An article which demonstrates an option to use RISC-V based host (MangoPi MQ-PRO) with USB accelerator (Intel Movidius NCS2) for deep learning inference.

License Type: Permissive

Learn Language: Russian

Learning

Microcontroller Applications with RISC-V (LFD115x)

Create simple embedded applications with a RISC-V microcontroller using a user-friendly integrated development environment (IDE). This course provides some basic experience in designing and developing deeply embedded bare metal applications using a microcontroller with a RISC-V core. The course is the first step to creating embedded systems using a host of new microcontrollers that use an open instruction set architecture (ISA) as an alternative to a proprietary option.

Learn Language: English

Learning

Programming with RISC-V assembly language, via Udemy

In this course, you will learn the basics of programming RISC-V assembly language. You will develop programs that run under Linux on a RISC-V board or in a RISC-V simulator. The course provides a hands-on introduction to assembler with RISC-V. Contents: - Setting up a toolchain and development environment for programming Linux applications with RISC-V assembler - Understanding and using the RISC-V user-level ISA - Basic instructions and pseudo instructions with RISC-V assembler - Assembler instructions for the GNU assembler - Basic programming with assembler for control structures like loops, functions, conditions, recursions - Use of system calls - Application Binary Interface - Programming input and output via the console - Calling of external functions of the standard C library, e.g. for reading files - Use of the floating point extension Note: Language is German

License Type: Mixed

Learn Language: German

Learning

RISC-V Toolchain and Compiler Optimization Techniques (LFD113x)

Develop a working knowledge of the internals of compiler toolchains and compiler optimization techniques with a focus on RISC-V applications. As RISC-V has made it easier to bring up processor chipsets, the need for compiler engineers in the RISC-V ecosystem has increased. There is an implicit need for toolchain experts who can help RISC-V vendors gain an edge over competitors with their expertise in compilation technologies. Learning about internals of the toolchain, building and debugging RISC-V applications will allow you to work with thousands of companies that are building the latest hardware technologies.

Learn Language: English

Learning

6.375 Course Handouts

Organization: MIT

Lectures, Tutorials, Examples, Final Project, Lab Assignments.

Learn Language: English

Learning

AAPG - Automated Assembly Program Generator for the RISC-V ISA.

Organization: IISc Bangalore automated assembly gen

Automated Assembly Program Generator (aapg) is a tool that is intended to generate random RISC-V programs to test RISC-V cores.

Learn Language: English

Learning

Building a RISC-V CPU Core (LFD111x)

Organization: RISC-V International

Create a RISC-V CPU with modern open source circuit design tools, methodologies, and microarchitecture, all from your browser. This mini-workshop is a crash course in digital logic design and basic CPU microarchitecture. Using the Makerchip online integrated development environment (IDE), you will implement everything from logic gates to a simple, but complete, RISC-V CPU core. You will be amazed by what you can do using freely-available online tools for open-source development. You will walk away with fundamental skills for a career in logic design, and you will position yourself on the forefront by learning to use the emerging Transaction-Level Verilog language extension (even if you don’t already know Verilog).

Learning

CDA3101: Computer Organization II

Organization: Florida State University

CDA3101 is a core course intended for CS and CE majors with a background in C/C++ programming. This course introduces concepts that include processor datapath and control, pipelining, memory hierarchy, virtual memory, and input/output.

Learn Language: English

Learning

Updates and edits to existing entries, as well as contribution of new entries, are welcome! Please submit your inputs here.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.