RISC-V Exchange

The RISC-V Exchange hosts the hardware, software, services, and learning offerings in the RISC-V community. Browse the list or search for an offering below.

6.375 Course Handouts

Lectures, Tutorials, Examples, Final Project, Lab Assignments.

Organization: MIT

Learn Language: English

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AAPG - Automated Assembly Program Generator for the RISC-V ISA.

Automated Assembly Program Generator (aapg) is a tool that is intended to generate random RISC-V programs to test RISC-V cores.

Organization: IISc Bangalore – automated assembly gen

Learn Language: English

Learning

Building a RISC-V CPU Core (LFD111x)

Create a RISC-V CPU with modern open source circuit design tools, methodologies, and microarchitecture, all from your browser. This mini-workshop is a crash course in digital logic design and basic CPU microarchitecture. Using the Makerchip online integrated development environment (IDE), you will implement everything from logic gates to a simple, but complete, RISC-V CPU core. You will be amazed by what you can do using freely-available online tools for open-source development. You will walk away with fundamental skills for a career in logic design, and you will position yourself on the forefront by learning to use the emerging Transaction-Level Verilog language extension (even if you don’t already know Verilog).

Organization: RISC-V International

Learning

CDA3101: Computer Organization II

CDA3101 is a core course intended for CS and CE majors with a background in C/C++ programming. This course introduces concepts that include processor datapath and control, pipelining, memory hierarchy, virtual memory, and input/output.

Organization: Florida State University

Learn Language: English

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Clarvi - a RISC-V processor

Clarvi ('Computer LAboratory RISC-V Implementation') is a simple, in-order, 6-stage pipeline implementation of a processor in SystemVerilog. It implements the base 32-bit RISC-V instruction set (RV32I) with minimal supervisor mode support. It can use a shared external instruction and data memory but has no caches. Additionally it can communicate with other peripherals in a system using a simple memory-mapped I/O bus, which we will use later on. Clarvi is described in more detail in the Computer Design lectures. The full specification of the RISC-V instruction set can be found on RiscV.org, and we also have a copy of the RISC-V Green Card instruction set summary (also included in your Computer Design handout). You may also wish to consult our Assembly Programming Guide for tips on assembly language programming.

Organization: University of Cambridge

Learn Language: English

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CMPE-110-01 Course Syllabus

Organization: UC Santa Cruz

Learn Language: English

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Computer Organization and Design RISC-V Edition: The Hardware Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design)

The new RISC-V Edition of Computer Organization and Design features the RISC-V open source instruction set architecture, the first open source architecture designed to be used in modern computing environments such as cloud computing, mobile devices, and other embedded systems. With the post-PC era now upon us, Computer Organization and Design moves forward to explore this generational change with examples, exercises, and material highlighting the emergence of mobile computing and the Cloud. Updated content featuring tablet computers, Cloud infrastructure, and the x86 (cloud computing) and ARM (mobile computing devices) architectures is included.

Learning

Computer Organization and Design, 2nd Edition

Patterson and Hennessy brilliantly address the issues in the ever changing computer hardware architecture. Professor Jae Oh, Syracuse Authors: David Patterson & John Hennessy Availability: Now Edition: 2nd Pages: 736 Price on Amazon: $95 ISBN-13: 978-0128203316 Publisher: Morgan Kaufman Likely the most popular undergraduate textbook in computer architecture now has a version using RISC-V. Computer Organization and Design RISC-V Edition: The Hardware Software Interface, Second Edition, the award-winning textbook from Patterson and Hennessy that is used by more than 40,000 students per year, continues to present the most comprehensive and readable introduction to this core computer science topic. Also: the previous edition is still available on Amazon.

Learn Language: English

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Computer Organization course Syllabus - Fall 2017

The focus of this course is on the selection and interconnection of components that make up a computer. There are two essential categories of components in modern computers: the hardware (the physical medium of computation) and the software (the instructions executed by the computer). As technology becomes more complex, the distinction between hardware and software blurs. We study why this happens, as well as why hardware designers need to be concerned with the way software designers write programs and vice versa. Along the way, we learn how computers work from higher-level programming languages such as Python and JavaScript, to system-level languages like C and Java, down to the basic zeroes and ones of machine code. Topics include Boolean logic, circuit design, computer arithmetic, assembly and machine languages, memory hierarchies, and parallel processing. While we discuss some aspects of x86 architecture we will focus on RISC architectures including MIPS and the now-ubiquitous ARM. Special attention will be given to the recently-developed, open-source RISC-V architecture.

Organization: Sarah Lawrence College

Learn Language: English

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CS 6133 Computer Architecture 1 Fall 2018

Course Objectives : What will you learn ? Computer architecture, unpipelined CPU design, memory hierarchies, pipelined CPU design and high-speed CPU design. Course Outcomes : What will you be able to do once the course is completed ? Design and analyze computer architectures, design an

Organization: New York University

Learn Language: English

Learning

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