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Workshop Recap
Thanks to everyone who attended the RISC-V Workshop in Barcelona! With 325 attendees, this was our biggest event outside of Silicon Valley, demonstrating the momentum of the RISC-V Foundation and the growth of the ecosystem in Europe.
We were excited to see the news unveiled by member companies announcing new solutions and partnerships, and a strong commitment to the RISC-V ISA. Below you’ll find a recap of these announcements and highlights of the media coverage that has appeared in various publications such as TechCrunch, EE Journal, Electronics Weekly and Embedded Computing Design.
We would like to share a special thanks to Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC) for co-hosting the Workshop, and to NXP and Western Digital for co-sponsoring the successful event.
To view the Workshop proceedings, including the slides from the sessions, please visit:
https://riscv.org/2018/05/risc-v-workshop-in-barcelona-proceedings/
Ecosystem News
Antmicro Reveals Partnership With Thales On The Disruptive RISC-V Open ISA
Express Logic’s X-Ware IoT Platform® Brings Industrial-Grade IoT Device Connectivity To The AndesCore™ N25 And NX25 RISC-V Processors
Microsemi And SiFive Launch HiFive Unleashed Expansion Board, Enabling Linux Software and Firmware Developers To Build RISC-V PCs For The First Time
NetSpeed And Esperanto Partner To Power SoCs For Artificial Intelligence
SiFive Announces Investment From Intel Capital
SiFive Challenge Calls For RISC-V Hardware Innovations
UltraSoC Analytics IP Selected By Esperanto Technologies For RISC-V Many-core Parallel Processing In AI And ML Applications
Coverage Highlights
