eeNews Embedded Article: New Core And Tools Make Implementing RISC-V Quicker

Codasip has launched the latest version of the company’s Studio tool and the Bk7 RISC-V core, which has been optimised for Linux and real-time performance. Studio allows a high-level description of a processor to be written in CodAL and then automatically synthesize the design’s RTL, test bench, virtual platform models, and processor SDK (C/C++ compiler, debugger, profiler, etc.). Development time is reduced due to the methodology that uses an Instruction Accurate (IA) processor model in CodAL for SDK generation and a Cycle Accurate model for implementation.

Studio has also been used to develop the Bk7 processor, the latest RISC-V micro-architecture in the Codasip portfolio. Bk7 is a 64-bit machine with a balanced 7-stage pipeline with branch prediction, optional full MMU with virtual addressing support for operating systems such as Linux, and support for popular RISC-V standard extensions and industry-standard external interfaces. Bk7 is Codasip’s highest-performance processor to date and is fully customizable, so additional instructions, registers or interfaces can easily be implemented.

 

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