In the pool of 32-bit RISC-V microcontroller cores (E20 by SiFive, VEGA ET1031 by C-DAC), CloudBEAR showcased its 32-bit small and efficient MCU core – BM-310 at RISC-V GLOBAL FORUM...
Read More
Time-sensitive applications such as automotive and robotics require fast and consistent response times. Features such as caches and branch prediction hamper responsiveness. SiFive CPUs can disable these features to deliver...
Read More
A boom in low cost edge AI chips using the RISC-V technology is coming says Facebook’s chief AI scientist Yann LeCun The move to RISC-V for running neural networks for...
Read More
Faster, More Efficient SiFive 7-Series Core IP Today, we’re announcing the SiFive 20G1 6.0 update, which is focused on improving the 7-Series line of products. Our previous release, SiFive 20G1,...
Read More
Imperas RISC-V reference simulator and model extended for coverage analysis, plus test suite for latest RISC-V Vector Instruction Extensions. riscvOVPsim™ updated for the latest RISC-V Vector Instructions Specification, for coverage-based...
Read More
Experts at the Table: The current state of open-source tools, and what the RISC-V landscape will look like by 2025. Read the full article.
Read More
Calista Redmond is the CEO of the RISC-V International, a global nonprofit association based in Switzerland. Founded in 2015 as the RISC-V International with 29 members, RISC-V is now a...
Read More
In this lecture I describe how to get started on Project 2, in which you begin to build your RISC-V processor.
Read More
Microchip’s PolarFire SoC FPGA Icicle Kit is an evaluation platform for the company’s mid-range PolarFire SoC FPGA family, a portfolio of RISC-V-based devices that contain secure hardware features, are capable...
Read More