eeNews Europe Article: Codasip Wins RISC-V Business In Motor Control ICs

Codasip Ltd. (Brno, Czech Republic), a developer of RISC-V based processor intellectual property, has licensed its Bk3 processor to Dongwoon Anatech Co. Ltd. (Seoul, South Korea) a developer of autofocus motor control ICs for use in mobile phone cameras.Dongwoon Anatech, a fabless analog semiconductor specialist, offers a wide range of analog products, including auto-focus driver IC for smartphones, AMOLED DC-DC converter, display power driver IC, and haptic driver IC.The Bk3…

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The Register Article: Brains Behind seL4 Secure Microkernel Begin RISC-V Chip Port

Last week, the first RISC-V port of its seL4 microkernel was released by the Data61 division of the Australian government’s Commonwealth Scientific and Industrial Research Organisation (CSIRO).seL4 is an open-source and highly secure version of the L4 microkernel that aims to be mathematically proven to be bug free, in that it works as expected as per its specifications. Meanwhile, RISC-V is an open-source instruction-set architecture, and is used as the blueprint for various open-source processor…

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RISC-V Founding Member Antmicro Turns Platinum To Bring A Software-Driven Perspective

Antmicro, an industrial R&D company combining latest software and hardware technologies to create advanced cyber-physical and edge AI products, and a Founding Member of the RISC-V Foundation, has announced that it is upgrading its status to Platinum to reflect its strong commitment to RISC-V.Building on the worldwide momentum of the RISC-V initiative, Antmicro is committed to take its active role within the Foundation to a new level and assert leadership…

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Dongwoon Anatech Licenses Codasip’s Bk3 RISC-V Processor For Motor Control ICs For Mobile Camera

Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Dongwoon Anatech, a technology leader in analog and power ICs for mobile phones, has selected Codasip’s Bk3 processor and Studio design tool for its next generation family of motor control IC products.Dongwoon Anatech, fabless analog semiconductor specialist, offers a wide range of analog products, including auto-focus driver IC for smartphones, AMOLED DC-DC converter, display power driver IC, and haptic…

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RISC-V Foundation And Informa Announce First Annual RISC-V Summit In Silicon Valley And 2018 Workshop Schedule

To Support the Ecosystem’s Ongoing Growth and Increased Global Footprint, RISC-V Foundation Partners with KNect365 to Help Facilitate Events in 2018 and Beyond Berkeley, Calif. – April 23, 2018 – The RISC-V Foundation, a non-profit corporation controlled by its members to drive forward the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today announced, in partnership with Informa’s Knowledge & Networking Division,  KNect365, the RISC-V Foundation’s…

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RISC-V Workshop in Barcelona Agenda

Agenda for the RISC-V Workshop in Barcelona 7-10 May, 2018 Co-hosted By Co-sponsored By The RISC-V Foundation invites you to attend the RISC-V Workshop in Barcelona, Spain on 7-10 May, 2018. Co-hosted by the Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC), and co-sponsored by NXP and Western Digital, the RISC-V Workshop in Barcelona will gather the RISC-V ecosystem to share notable RISC-V updates, projects and implementations.Keynote sessions will…

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Computer Business Review Article: Rambus Releases Programmable Chip In Wake Of Spectre, Eyes Automotive Market

Semiconductor maker Rambus has released a new programmable chip that aims to “establish the trust chain” early in the silicon manufacturing process, amid widespread industry concerns about chip vulnerabilities.The release comes after security flaws “Meltdown” and “Spectre” were independently disclosed by multiple security researchers, including Rambus’s then-chief scientist Paul Kocher and Mike Hamburg, in January 2018.The two security flaws exploit critical vulnerabilities across a wide range of modern processors, including Intel, ARM and AMD….

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Australian Innovation To Enhance Security Of Billions Of Connected Devices

Data61 has today released an initial version of seL4 for RISC-V (pronounced risk-five), a free and open Instruction Set Architecture (ISA*) enabling a new era of processor innovation through open standard collaboration.Future versions of the seL4 microkernel will fully support the RISC-V architecture. The RISC-V Foundation has significant backing from over 100 members including major industry players such as IBM, Google, Microsemi, Qualcomm, Samsung, Western Digital and many more.CSIRO has…

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ComputerWorld Article: Data61 Ports SeL4 Microkernel To RISC-V Architecture

Data61 has released an initial version of the seL4 microkernel for the RISC-V architecture.The port is only in prototype stage and according to release notes “currently only supports running in 64-bit mode without FPU or multicore support on the Spike simulation platform.”“There is no verification for this platform,” the release notes add. The open source seL4 kernel was developed to be highly secure. It was the first general-purpose operating system kernel formally proved correct against…

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HPC Wire Article: Hennessy & Patterson: A New Golden Age For Computer Architecture

On Monday, June 4, 2018, the 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Symposium on Computer Architecture (ISCA) in Los Angeles. The celebrated computer architects have penned this short article (published on the ISCA website), previewing their talk: “A New Golden Age for Computer Architecture: Domain-Specific Hardware/Software Co-Design, Enhanced Security, Open Instruction Sets, and Agile Chip Development.”To read more,…

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