OpenHW TV: Driving AI/ML Innovation with CORE-V, Open-Source RISC-V Based Processors

The next episode of OpenHW TV will feature the artificial intelligence angle of the OpenHW Group CORE-V family. We will focus specifically on the CV32E40P RISC-V CPU.

In the last decade we experienced that as technology scales, silicon devices become smarter and smarter, capable of implementing complex functions on hand-sized (or lower) objects such as: face recognition on mobile phones; wearable sport and health monitoring products; smart glasses; augmented reality headset; etc. Such features have become real not only due to silicon scaling but also thanks to innovative computer architectures and software stacks.

In this webinar we will show how custom extensions to the baseline RISC-V architecture and advanced parallel computer architectures enable edge-computing pattern recognition algorithms running at high energy efficiency on battery-powered systems. We will conclude by showing applications leveraging it as autonomous driving drones and mobile vision applications.

The presentation will be held by Davide Schiavone from OpenHW Group and Angelo Garofalo from the University of Bologna.