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Bring RISC-V to your course in computer architecture using RVfpga
This workshop shows how to use RISC-V to teach computer architecture and the design of systems on chip (SoCs). Let us empower you to teach next generation computer science, electrical and computer engineering students with hands-on real-world expertise in computer architecture and the RISC-V instruction set architecture.
What is the RVfpga workshop about?
RISC-V is a rapidly growing world-wide movement. It is open source and provides extensions, making it easier to target to various platforms. This RVfpga workshop presents a commercial RISC-V system targeted to an FPGA, discusses the theory, architecture, and course structure, and shows how to use the hands-on labs that are provided as part of the complete RISC-V FPGA (RVfpga) Course. The course explores the fundamentals of computer architecture using Western Digital’s open-source, commercial SweRV EH1 RISC-V core targeted to a Xilinx Artix 7 FPGA on Digilent’s Nexys A7 development board. Everyone will get hands-on experience with this FPGA platform and the software tools, enabling a fast start when you return to your university.
What will you learn?
The workshop shows how to quickly get the RISC-V FPGA system and RISC-V tools up and running. Then, we describe all of the RVfpga labs and show how to use and work through a selection of the labs hands-on. We also discuss how to integrate RVfpga into your curriculum.
Specific topics include:
* Installing tools (which can be done before the workshop)
* Targeting the SweRV EH1 RISC-V core to an FPGA
* Analyzing and modifying the RISC-V-core and memory hierarchy
We send occasional news about RISC-V technical progress, news, and events.