Accelerate Verification of RISC-V Ariane design with VerifAI’s AI Test Engineer

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Abstract: VerifAI Inc. has pioneered the world’s first ‘AI Test Engineer’ called TestGuru which leverages Multiple Large Language Models (LLMs), Reinforcement Learning (RL), and Formal Methods to find and fix bugs in code while improving coverage and speeding up verification by 100x.

TestGuru comprises three components: CodeGuru, SimulationGuru, and DebugGuru.

This talk will demonstrate how VerifAI’s tools can generate UVM tests for the RISC-V Ariane Design.
We will showcase VerifAI’s VSCode Plugin and illustrate its capabilities in automatically generating UVM tests for the RISC-V Ariane design, as well as explain and analyze the Verilog code.

We will discuss how VerifAI’s SimulationGuru improves coverage on the RISC-V Ariane Design’s Data-Cache.
Specifically, we will present a use case focused on increasing the ‘victim buffer count’ in the Data-Cache, highlighting the practical application of VerifAI’s technology in improving the verification and testing process for complex hardware designs.