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We send occasional news about RISC-V technical progress, news, and events.
A hackathon organized by neuroTUM in collaboration with the Chair of AI Processor Design
Imagine crafting a custom CPU tailored for AI applications – it’s an engineer’s dream! This vision can become your reality at our upcoming ASIP (Application Specific Instruction-Set Processor) Designer Hackathon. In an exclusive partnership with the Chair of AI Processor Design, Prof. Amrouch, and sponsored by Synopsys, as well as the CIT School: Informatics, MSNE, and Electrical Engineering, neuroTUM is proud to host a groundbreaking 4-day event dedicated to the art of CPU architecture!
We send occasional news about RISC-V technical progress, news, and events.