Industry Events

Second International Workshop on Secure RISC-V (SECRISC-V) Architecture Design Exploration seeks original research papers on the design, implementation, verification, and evaluation of micro-architecture security features, hardware-assisted security techniques, and secure...

The HPC Connection Workshop is an international High Performance Computing event organized by the Asia Supercomputer Community and Inspur.

Virtual and in-person Lightening Panels: Will the next generation of HPC computing be built-to-order at run time? Dynamic infrastructure represents a new way provision just the right amount of bare-metal...

RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. This development in the semiconductor market has been an area of much interest...