RISC-V Ecosystem News

The RISC-V architecture is increasingly valued by the industry. The number of RISC-V new license contracts and overall revenue is expected to double this year. The RISC-V licenses accounted for a quarter of last year’s revenue, and this year’s share is expected to increase as well.The RISC-V architecture has gradually gained market attention. Lin Zhiming, general manager of Jingxin Branch, said that more than one-third of the 21 RISC-V solution…

Sipeed released their 64-bit RISC-V MAix module at the end of last year, crowdfunding a series of boards on Indiegogo built majorly to do machine learning inferencing at the edge, with no cloud needed. There has been a lot of work put in, to document and support the MAix module, including both Arduino support and a port of MicroPython. Sipeed’s Maixduino is a MAix-based board that features a “classic” Arduino form factor which is pin-compatible to the…

Microchip Technology demonstrates the industry’s first RISC-V SoC FPGA architecture that brings real-time to Linux, giving developers the freedom to innovate in low-power, secure and reliable designs. To see the video, please visit: https://www.youtube.com/watch?v=hdFPPO4vjLo.

CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced Antmicro is joining the organization. Antmicro is a software-driven technology company focused on introducing open source into strategic areas of industry, especially edge AI. Announced just last month, the CHIPS Alliance welcomes Antmicro among its initial members Esperanto Technologies, Google, SiFive, and Western Digital.CHIPS Alliance is a project hosted by the Linux Foundation to…

These eight companies are developing their own RISC-V technologies and are committing to helping third parties do the same to help push adoption of the open-source chip architecture.RISC-V (pronounced “risk five”), the open-source architecture for chip design, has been making a lot of noise in the past few years. The open source nature of RISC-V promises to enable companies to create custom chip hardware specifically tailored to their products and…

Andes has upgraded its A25 and AX25 RISC-V CPUs, adding cache-coherent multicore support in the new MP models along with an optional DSP extension. The designs implement the AndeStar V5 ISA, which is a superset of RISC-V. The A25 is compatible with RISC-V’s 32-bit RV32 ISA, and the 64-bit AX25 is compatible with RV64. They employ the same architecture as the company’s N25 and NX25, respectively, but add an MMU…

On April 11, the 6th class of the “Science Entrepreneur” project, jointly organized by Wudaokou Finance College of Tsinghua University, Shenzhen International Graduate School of Tsinghua University and Sloan School of Management of MIT (Smith Management School), officially opened in Huizhou. This class is specially designed for science entrepreneurs in Dawan District of Guangdong, Hong Kong and Macao. It aims to combine the cutting-edge technological innovation of the world with…

You don’t have to use proprietary virtualization software to run virtual machines. The open source community boasts offerings for all different virtualization needs, so you can assemble a program that has exactly the features you want without high upfront costs or tricky service-level agreements.Open source virtualization software can help you avoid the costs that come with proprietary software from vendors such as VMware. It also enables you to get updates…

Towards the tail end of last year, Sipeed released their 64-bit RISC-V MAix module, crowdfunding a range of boards on Indiegogo specifically designed to do machine learning inferencing at the edge. No cloud needed.Unlike a lot of crowdfunded boards and modules that disappear almost as soon as they’ve arrived, since the release back in November then there has been a lot of work done to document and support the MAix…

In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.As markets demand more from their embedded systems, next-generation SoCs are becoming more complex, leading to lengthier design cycles and rising costs, according to Semico Research.The frustrating reality for device makers is that the only way to deliver the new and innovative features, greater security, and better…