Stay Connected With RISC-V
We send occasional news about RISC-V technical progress, news, and events.
This video shows how we can implement the Multiplication using add and shift RV32I instructions. RISC-V is growing rapidly, follow this RISC-V video blog series to obtain knowledge about RISC-V…
RISC-V Blog
This summer, I got the opportunity to work as a Formal Verification Intern with Axiomise for six weeks. I’m a keen designer and love working in design and architecture. Although,…
Verilator is a high performance, open source functional simulator that has gained tremendous popularity in its usage and adoption in the verification of chip design. The ASIC development community has…
There are now over a hundred RISC-V CPU cores listed in the RISC-V Exchange! Amazing. If you need a RISC-V CPU core, you’ll likely be able to find one that…
This video shows how we can implement the Multiplication using add and shift RV32I instructions. RISC-V is growing rapidly, follow this RISC-V video blog series to obtain knowledge about RISC-V…
In the News
CAES Receives Contract from Vinnova to Advance High Performance RISC-V Space Computing
CAES, a leader in advanced mission-critical electronics for aerospace and defense, announced today that it has been awarded a contract from Vinnova, a Swedish government agency dedicated to promoting innovation, to…
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René Rebe Patches the Linux Kernel for “World’s First” Look at a Radeon RX 6700XT on a RISC-V PC | Gareth Halfacree, Hackster.io
Computer scientist René Rebe has patched the Linux kernel to bring support for AMD's RDNA2-based Radeon RX 6700XT graphics card to RISC-V systems — starting with the HiFive Unmatched board.…
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Announcements
RISC-V International and seL4 Foundation Announce New Security Milestone
SAN FRANCISCO, May 5, 2021 – Today, the seL4 Foundation and RISC-V International announced that the verified seL4 microkernel on the RV64 architecture has been proved down to the executable…
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RISC-V International Welcomes Chengwei Capital as a Premier Member
Investment firm Chengwei Capital to join the RISC-V Board of Directors and Technical Steering Committee Zurich – April 29, 2021 – RISC-V International, a non-profit corporation controlled by its members…
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CHIPS Alliance and RISC-V International Invite the RISC-V Community to Participate in Updating a New Unified Memory Architecture Standard
New joint working group will enhance the OmniXtend Cache Coherency architecture SAN FRANCISCO, March 24, 2020 – RISC-V International, a non-profit corporation controlled by its members to drive the adoption…
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Learn About the RISC-V ISA with Two Free Training Courses from The Linux Foundation and RISC-V International
The online courses are offered on edX.org and will make RISC-V training more accessible SAN FRANCISCO - EMBEDDED WORLD - March 2, 2021 – The Linux Foundation, the non-profit organization…
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