The NOEL- V processor will be RV64GC compliant, a 64-bit architecture, and is written in VHDL. The processor will be fully integrated with Cobham’s GRLIB VHDL IP core library.article: https://www.cobham.com/advanced-electronic-solutions/news/cobham-releases-risc-v-processor-ip-core/
Read More...Hex Five Announces General Availability of MultiZone™ Security for Linux – The First Commercial Enclave for RISC-V processors
Date:December 10, 2019
Enabling safety-critical applications in mixed-criticality systems where Linux and realtime come together in a single chipSan Jose, California, Dec. 10, 2019, RISC-V Summit — Hardware consolidation requirements in automotive, aerospace & defense, and industrial automation are forcing embedded systems designers to merge safety-critical functionality with untrusted applications and operating systems. The resulting monolithic systems present vastly larger code base, greater attack surface, and increased system vulnerability. In response, Hex Five…
Read More...Antmicro and zGlue release rapid turnaround chiplet-based GEM ASIC
Date:December 10, 2019
SAN JOSE, CA – December 10th, 2019 – Today, edge AI technology expert company and RISC-V leader Antmicro, and zGlue, a Silicon Valley startup democratizing the procedure of custom chip creation using their innovative chiplet technology, have announced the release of Antmicro’s first chiplet-based ASIC in a series called GEM. Together, the companies want to drive the emerging market of optimized-for-purpose, software-driven, affordable and rapid turnaround chip design.“With the company’s…
Read More...CODASIP TEAMS UP WITH WESTERN DIGITAL TO SUPPORT ADOPTION OF OPEN-SOURCE PROCESSORS
Date:December 10, 2019
Munich, Germany – December 10th, 2019 – Codasip GmbH, the leading supplier of configurable RISC-V® embedded processor IP, announced today that it has joined forces with Western Digital Corp. (NASDAQ: WDC) to become the preferred provider of hardware implementation packages and expert technical support for users of Western Digital’s SweRV CoreTM EH1, a RISC-V core currently available to the open-source community and further supported by the open-source development organization CHIPS…
Read More...RISC-V Foundation Seeks Technology Leader
Date:December 9, 2019
The RISC-V Foundation is looking for a technology leader who can foster a successful technical ecosystem with deep member and community engagement and meaningful progress across technical imperatives in growing adoption of the RISC-V architecture. The technology leader will facilitate the technical vision, cultivate stakeholder engagement, and drive the strategy in collaboration with RISC-V members. This person will be the Foundation’s technical leader in facilitating progress across our workgroups and…
Read More...Tensorflow Lite in Zephyr on LiteX/VexRiscv
Date:December 9, 2019
While much of the focus for the recent developments in AI has been on cloud-centric implementations, there are many use cases where AI algorithms have to be run on small and resource constrained devices. Google’s TensorFlow Lite, a smaller brother of one of the world’s most popular Machine Learning frameworks, is focused on exactly that – running neural network inference on resource constrained devices. A more recent but very exciting…
Read More...Andes certifies Imperas models and simulator as reference for new Andes RISC-V Vectors Core with lead customers and partners
Date:December 9, 2019
Imperas code morphing simulation technology, virtual platforms and tools used by lead customers for early software development and high-level architectural explorationOxford, United Kingdom, December 4th, 2019 — Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced with Andes Technology Corporation, the close collaboration with lead customers for the latest Andes Vectors Core NX27V, which addresses the requirement for advanced ML (machine learning) and AI (artificial…
Read More...RISC-V Foundation Founding Member Andes Technology Turns Platinum
Date:December 5, 2019
Hsinchu Taiwan, Dec. 03, 2019 (GLOBE NEWSWIRE) — Andes Technology Corporation (TWSE: 6533), a founding member of the RISC-V Foundation and the leading supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 1-billion diversified SoCs yearly, today announced that it has upgraded its membership in the RISC-V Foundation to Platinum.Andes Technology joined the RISC-V Foundation in 2016 as a founding member and brought its extensive experience in…
Read More...A RISC-V Fully European Platform For Space | Julien Happich, eeNews Europe
Date:December 5, 2019
Officially launched in October, the Horizon 2020 European project De-RISC (Dependable Real-time Infrastructure for Safety-critical Computer) has gathered an international consortium to develop a hardware and software platform based around the RISC-V ISA for the space and aviation market. article: https://www.eenewseurope.com/news/risc-v-fully-european-platform-space
Read More...IAR Systems Updates RISC-V Development Tools With Support For RV32E And Atomic Operations
Date:December 5, 2019
Uppsala, Sweden—December 3, 2019—IAR Systems®, the future-proof supplier of software tools and services for embedded development, announces that a new version of the toolchain IAR Embedded Workbench® for RISC-V is now available. Version 1.20 adds support for the base instruction set RV32E and also the standard extension for Atomic operations (A).One of the major benefits of using RISC-V is the flexibility the architecture provides, which enables OEMs as well as…
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