RISC-V News

RISC-V E-Newsletter June 2017

Click HERE to Join the RISC-V Foundation Mail Lists First RISC-V Foundation workshop outside North America sells out The 6th RISC-V Workshop, co-hosted by NVIDIA and the Shanghai Jiao Tong University (SJTU) was held in Shanghai China on May 8-11, 2017.  This was our first RISC-V Foundation workshop held outside of North America and as with past workshops, this event was sold out with over 270 registered attendees. Workshop proceedings are…

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7th RISC-V Workshop Call for Papers

Call for Papers 7th RISC-V Workshop November 28-30, 2017We’re seeking proposals for talks and poster presentations conveying recent activity in the RISC-V community at the upcoming 7th RISC-V workshop hosted by Western Digital in Milpitas California on November 28-30, 2017.Talks can be of two lengths (25 minutes and 12 minutes), and talk presenters are expected to also participate in the poster session to allow extended discussion. All poster presenters will give…

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7th RISC-V Workshop Save the Date

7th RISC-V Workshop November 28-30, 2017Please save the date and plan to join us for our 7th RISC-V Workshop, hosted by Western Digital in Milpitas California November 28-30, 2017.  As with past workshops, our goals for these events are to bring the RISC-V community together to share information about recent activity in the various RISC-V projects underway around the globe, and build consensus on the future evolution of the instruction set.Each of our past…

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The RISC-V Memory Consistency Model

Krste Asanović, Chairman, RISC-V FoundationMemory consistency models (MCMs) are known to flummox even experienced computer architects, so it is perhaps not surprising that recent news articles had some difficulty portraying the nuances behind recent findings by a team of Princeton researchers led by Professor Margaret Martonosi.  The RISC-V Foundation is publishing this article to help the RISC-V community understand the deeper implications of the Princeton study. Executive Summary The Princeton team…

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RISC-V Enters Mainstream at Embedded World 2017

Berkeley, California – Over the last year the RISC-V architecture has evolved from an academic research interest to a mainstream embedded processor technology with a rich ecosystem and a fast-growing number of real-world implementations. As a sign of this progress, a number of companies will be demonstrating commercial implementations of RISC-V products next week at Embedded World 2017, the leading international trade fair for embedded systems (March 14-16, Nuremberg, Germany) https://www.embedded-world.de/enRISC-V…

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RISC-V chosen as Best Technology of 2016

The Linley Group Announces Winners of Annual Analysts’ Choice Awards   In a news release issued today, January 12th, 2017, The Linley Group today announced the winners of its annual Analysts’ Choice Awards which recognize the top semiconductor products of 2016 in seven categories: embedded processors, mobile processors, server processors, processor-IP cores, mobile chip, networking chip, and best technology.  The RISC-V Instruction Set Architecture was selected as the Best Technology of 2016.In…

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RISC-V Foundation Appoints Board of Directors

RISC-V Foundation appoints inaugural Board of Directors Seven Directors Appointed to the BoardBerkeley, CA, June 9, 2016 – Today, the RISC-V Foundation is pleased to announce the Foundation’s inaugural Board of Directors.  Seven industry veterans with varied career experience within large multinational companies, smaller startup companies, non-profit organizations and academia have been appointed to serve on the RISC-V Foundation Board of Directors.The inaugural set of Directors include: Krste Asanović as…

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RISC-V Offers Simple, Modular ISA

  The RISC-V ISA has been featured in the latest edition of the Microprocessor Report written by David Kanter of The Linley Group.The RISC-V Foundation has retained distribution rights for this report.  The full report is shown below and it can be downloaded and freely distributed.  

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Charting a New Course for Semiconductors

The Global Semiconductor Alliance has released a new report “Charting a New Course for Semiconductors” which explores the future of the semiconductor industry and asks “Is RISC-V the new Linux?”.                               Global Semiconductor Alliance Releases New ReportThe report includes 4 Chapters covering key areas including: Chapter 1 – An Industry in Transition – Rising development costs, decreasing margins and…

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RISC-V Draft Compressed ISA version 1.9 released

The RISC-V Compressed Instruction Set Manual Version 1.9 Draft proposal has been released and is available at this link.  You can also download a PDF version at this link.We welcome community feedback and comments on this draft. We believe this draft represents the close to final design for RV32C and RV64C (it seems premature to freeze R128C), though we are requesting one more round of comments, hence the 1.9 revision…

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