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We send occasional news about RISC-V technical progress, news, and events.
MIPS previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors. SAN JOSE, Calif., May 10, 2022 /PRNewswire/ -- MIPS, a leading developer of highly scalable RISC processor IP,…
RISC-V Blog
MIPS previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors. SAN JOSE, Calif., May 10, 2022 /PRNewswire/ -- MIPS, a leading developer of highly scalable RISC processor IP,…
The company aims to promote the development and application of the RISC-V open standard in ecosystems for HPC applications. Scandiano (RE), May 3rd 2022 – E4 Computer Engineering (E4)…
India’s top VLSI Training Services company Maven Silicon, a RISC-V Global Training Partner, conducted an insightful discussion with the industry experts Ms. Calista Redmond, CEO, RISC-V International and Mr. Sivakumar…
Dear Professors and Friends, Online is convenient and it has saved us during the pandemic, but you can't beat in-person class! That immersive feeling of hands-on and the shared mission…
In the News
RISC-V Open Era of Computing – A Conversation with Calista Redmond and Mr. Sivakumar P R , Founder and CEO of Maven Silicon | Maven Silicon
India’s top VLSI Training Services company Maven Silicon, a RISC-V Global Training Partner, conducted an insightful discussion with the industry experts Ms. Calista Redmond, CEO, RISC-V International and Mr. Sivakumar…
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HPCwire‘s People to Watch Program | HPCWire
2022 marks the 20th year of HPCwire‘s People to Watch Program, which recognizes HPC professionals who play leading roles in driving innovation within their particular fields, making significant contributions to society…
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MIPS Chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA Compatible IP Cores | Ashling and MIPS, BusinessWire
Ashling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS RISC-V ISA based IP cores. RiscFree™ is Ashling’s Integrated Development Environment (IDE) including a compiler and debugger for RISC-V…
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Announcements
Intel Corporation Makes Deep Investment in RISC-V Community to Accelerate Innovation in Open Computing
RISC-V welcomes Intel to the Board of Directors to collaborate on RISC-V IP and contribute engineering expertise to accelerate RISC-V software development ZURICH – February 7, 2022 – RISC-V International,…
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RISC-V Founding Member, Syntacore, Upgrades to Premier Level Membership
ZURICH – Dec. 7, 2021 – RISC-V International, a global open hardware standards organization, today announced that Syntacore, a semiconductor IP company specializing in customizable microprocessor cores and tools based on…
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RISC-V Celebrates Incredible Year of Growth and Progress, Ratifying Multiple Technical Specifications, Launching New Education Programs, and Accelerating Broad Industry Adoption
With billions of chips in the market, RISC-V has seen widespread commercial adoption across industries and implementations, from embedded automotive to hyperscale AI, from 5G to HPC and beyond. Zurich…
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