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We send occasional news about RISC-V technical progress, news, and events.
RISC-V Summit brings together the global RISC-V community after a banner year San Jose, Calif. – Dec. 13, 2022 – RISC-V International, the global open standards organization, highlighted the community’s…
RISC-V Blog
SAFERTOS® is a real-time operating system (RTOS) designed specifically for use in safety-critical systems. WITTENSTEIN high integrity systems is a Mi-V Ecosystem Partner of Microchip and have ported SAFERTOS® on…
New RISC-V International member SOPHGO is committed to the development and promotion of AI RISC-V CPU and other computing products. RISC-V member Milk-V delivers high-quality RISC-V products to developers, enterprises,…
Safety and security are increasingly important aspects when designing computer systems, and work is carried out within RISC-V International technical groups to establish specifications that address safe and secure computing.…
Space applications pose significant challenges for electronic systems as they must contend with a myriad of environmental factors once they are launched. These factors include extreme temperatures, radiation, shock, and…
In the News
Agile Analog launches first complete RISC-V analog IP subsystem at RISC-V Summit Europe
Agile Analog, the customisable analog IP company, is launching the first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona (5-9 June). The initial subsystem…
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Adding RISC-V Vector Cryptography Extension support to QEMU
RISC-V is an open source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. Codethink has been working with the RISC-V CPU architecture for several years. We've…
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RISE to boost development of open source RISC-V software
Chip designers are at the heart of a new project to boost the development of open source software for the RISC-V instruction set. The RISC-V Software Ecosystem (RISE) Project is…
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UltraRISC Selects Valtrix STING for Verification of RISC-V SoC Designs
BANGALORE, India, June 1, 2023 /PRNewswire/ -- Valtrix Systems, an industry leading provider of RISC-V design verification products for building functionally correct CPU and system-on-chip implementations, announced today that UltraRISC, a leading provider…
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Announcements
Ashling and Imagination announce Ashling’s RiscFree™ C/C++ SDK support for RISC-V-based Catapult family.
Embedded World, Mar-14 2023, Nuremberg, Germany. Ashling and Imagination Technologies announced today that Ashling’s RiscFree SDK will provide software development support for Imagination’s Catapult RISC-V-based IP cores. RTXM-2200 is the…
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First-ever RISC-V Summit Europe Will Demonstrate Technical and Commercial Momentum Across Industries
The Barcelona RISC-V Summit from June 5-9 to focus on industries such as Automotive, High Performance Compute/Data Center, and Security; Call for Submissions and Sponsorships now open BARCELONA, Spain…
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