Tiempo Secure announces TESIC RISC-V Secure Element IP and development kit

Grenoble, France – March 8, 2023 – As security is increasingly the central issue of any SoC (System on Chip) development, for example taking into account initiatives like the Cyber Resilience Act, Tiempo Secure has decided to enrich the RISC-V community with security expertise by developing a new version of its TESIC Secure Element IP based on a RISC-V microcontroller. Given the global evolution from software to hardware based security, this new development combines the best of both worlds as it inherits the security features that have made TESIC one of the most recognized Secure Element IP platforms with the advantages of the RISC-V widely developed ecosystem, including an extensive offer in terms of development tools adopted by a large community of developers. It is fully adapted to any design that requires a Secure Enclave, Secure Element or Root of Trust that is highly protected against side channel, perturbation and fault attacks.

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