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RISC-V Blog

Blog

Third Workshop on RISC-V Activities – It’s the ecosystem!

On Thursday October 8, the third Workshop on RISC-V Activities was hosted by edacentrum, due…
RISC-V Community News
RISC-V Community NewsNovember 2, 2020
BlogProceedings & Reports

RISC-V Global Forum 2020 Transparency Report

RISC-V Global Forum 2020 was RISC-V International’s firstever virtual event. The conference had 863 registered…
Kim McMahon
Kim McMahonOctober 29, 2020
Blog

Understanding Non-Local Jumps (setjp/longjmp) in RISC-V Assembly

By Daniel Mangum This post explores RISC-V assembly by examining the implementation of the setjmp…
RISC-V Community News
RISC-V Community NewsOctober 26, 2020
Blog

Member Webinar: Title: UVM Simulation-based environment for Ibex RISC-V CPU core with Google RISC-V DV

Description: This presentation showcases the RTL simulation of the SV/UVM testbench of the Ibex core,…
RISC-V Community News
RISC-V Community NewsOctober 26, 2020
Blog

Member Webinar: UVM-based Verification of Custom Instructions with RISC-V Cores

Description: By integrating Aldec’s Riviera-PRO™ with Codasip’s Studio™, verification of RISC-V CPU custom instructions at…
RISC-V Community News
RISC-V Community NewsOctober 26, 2020
Blog

Security Enclave IP based on RISC-V | Design and Reuse

Content originally posted on Design and Reuse: The eSecure IP is a single subsystem for…
RISC-V Community News
RISC-V Community NewsOctober 21, 2020
Blog

Move fast and break things? Not so fast in embedded.

Written by Shawn Prestridge, Industry profile and Senior Field Application Engineer/Team Leader for US FAEs…
Shawn Prestridge
Shawn PrestridgeOctober 12, 2020
Blog

A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference | Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini and Davide Rossi, Cornell University (White Paper)

Low bit-width Quantized Neural Networks (QNNs) enable deployment of complex machine learning models on constrained…
RISC-V Community News
RISC-V Community NewsOctober 8, 2020
Blog

Maven Silicon – a RISC-V Training Partner

This blog was orginally published on the Maven Silicon blog. RISC-V has accepted Maven Silicon…
Sivakumar P R
Sivakumar P ROctober 2, 2020
Blog

RISC-V: Standing on the Shoulders of Giants

RISC-V is officially a decade old. Here’s a look at what the organization has accomplished…
Mark Himelstein
Mark HimelsteinOctober 1, 2020
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  • About RISC-V
    • About RISC-V
    • History of RISC-V
      • RISC-V 10th Anniversary
    • Board of Directors
    • RISC-V Staff
    • Guidelines
      • Branding Guidelines
      • Blog Guidelines
      • RISC-V Social Guidelines
    • Code of Conduct
    • Contact Us
  • Membership
    • All Members
    • Become a Member
  • RISC-V Exchange
    • Available Boards
    • Available Cores & SoCs
    • Available Software
    • Training Partner Program
  • Technical
    • Technical Information
    • Specifications
    • Technical Forums
    • Tech Wiki
  • News & Events
    • News & Blogs
      • RISC-V Blog
      • Announcements
      • In the News
    • Events
      • RISC-V Events
      • Industry Events
      • Regional Events
      • Community Events (Meetups)
      • Event Proceedings & Reports
    • Newsletter Signup
  • Community
    • Community
    • Committees and Working Groups
      • Using the Working Groups Portal
      • Technical Working Groups Directory
      • Marketing Committees and Task Groups
    • Community Events (Meetups)
    • RISC-V Learn
      • RISC-V Learn Online
      • RISC-V Learn Contribute
      • RISC-V Training Partners
      • RISC-V Educational Materials
      • RISC-V Books
      • RISC-V Publications (Google Scholar)
    • RISC-V Alliances
    • RISC-V Ambassadors
    • RISC-V Gear
    • Newsletter Signup
  • Working Groups Portal
  • Join