Ventana will continue to contribute and accelerate technical progress and market adoption of RISC-V
ZURICH – Dec. 6, 2021 – RISC-V International, a global open hardware standards organization, today announced that Ventana Micro Systems Inc., a company developing high-performance data center class RISC-V processors that was recently named by CRN as one of the 10 hottest semiconductor startups, has upgraded to the Premier membership level. With its upgraded membership, Ventana’s founder and CEO, Balaji Baktha, will be joining the RISC-V Board of Directors. In parallel, Ventana’s co-founder and CTO, Greg Favor, will be joining the RISC-V Technical Steering Committee (TSC).
Ventana has been significantly involved in RISC-V developments over the past few years, and the company’s co-founder and CTO Greg Favor is Chair of the RISC-V Privileged Architecture ISA Committee. Some of Ventana’s contributions include its work to help develop the Fast Track Architecture Extension Process (Fast Track) that streamlines the ratification of small architecture extensions. Ventana also played an active role in the ratification of ZiHintPause, the first extension to be ratified under the new process. For these efforts and more, Greg was recognized by RISC-V with a 2020 RISC-V Top Technical Contributor award.
“Thanks to the strategic investment of members like Ventana, RISC-V has significantly accelerated and expanded our technical deliverables, ratifying a variety of new specifications, and rolling out new processes for increased efficiency,” said Calista Redmond, CEO of RISC-V International. “Ventana’s investment signals the industry adoption and expansion of RISC-V as Ventana addresses a variety of applications with its high-performance cores.”
Ventana’s executives will be participating in six sessions at the upcoming RISC-V Summit, taking place Dec. 6-8, 2021. These sessions include:
- Tuesday, Dec. 7
- 9:00 a.m. PT: Implementing Non-coherent I/O Devices in RISC-V presented by Greg Favor and David Kruckemyer, Ventana
- 9:30 a.m. PT: ACPI for RISC-V: Enabling Server Class Platforms presented by Sunil V L, Ventana
- 11:30 a.m. PT: RISC-V Debug in the OS-A Platform presented by Paul Donahue, Ventana
- 1:55 p.m. PT: Keynote Panel: RISC-V Momentum at Data Center Scale with Balaji Baktha, Ventana; Sumit Gupta, Google; Roger Espasa, Semidynamics Technology Services; Jing Yang, Alibaba; and Bapi Vinnakota, Open Compute Project ODSA Project Lead
- 2:40 p.m. PT: Keynote: Profiles and Platforms: RISC-V Convergence presented by Greg Favor, Ventana
- Wednesday, Dec. 8
- 9:00 a.m. PT: RISC-V Enterprise Software Ecosystem Readiness presented by Kumar Sankaran, Ventana
To learn more about Ventana, please visit: www.ventanamicro.com.
About Ventana Micro Systems Inc.
Headquartered in Cupertino, Ventana Micro Systems Inc. was founded in 2018 to revolutionize the processor market by offering high-performance, extensible and secure compute chiplets based on RISC-V’s open architecture.
About RISC-V International
RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration. RISC-V International comprises more than 2,400 members building the first open, collaborative community of software and hardware innovators powering an open era of processor innovation. The RISC-V ISA delivers a new level of free, extensible software and modular hardware, paving the way for the next 50 years of open computing design freedom and innovation.
RISC-V International, a non-profit organization controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of RISC-V International have access to and participate in the development of the RISC-V ISA specifications and related ecosystem.
To learn more about RISC-V, please visit: www.riscv.org