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SoC Design Challenge: the first engineering hackathon for students in Russia | Nickolay Ternovoy, Syntacore

By June 27, 2022June 30th, 2022No Comments

YADRO and Syntacore hosted the first ever engineering hackathon for students in Russia. The event was organized in association with National Research University of Electronic Technology (MIET) and took place on May 14-15, 2022. Bearing the title ‘SoC Design Challenge’, the hackathon aimed to help senior engineering students gain experience in modern RISC-V-based microprocessors design. Over 60 students participated in the event.

Students could register teams of 2 to 3, or register individually to be placed randomly in teams. The teams worked on specific technical challenges in three tracks: 

  • Topology design
  • Functional verification
  • RTL design

The three tracks represented essential parts of the IC development cycle and gave students an experience of working on real-life design challenges. RTL design has shown to become the most demanded track with 14 competing teams. All teams worked throughout two days and were mentored and evaluated by experts from YADRO Microprocessors, Syntacore and MIET.

“We wanted to create an opportunity for the students to stay connected to YADRO and the engineering industry. We hope that this experience will help future engineers to enhance professional portfolio, and will inspire them to reach new heights,” said Eugene Maximov, the Director of Ecosystem Development and Academic Initiatives for YADRO.

All hackathon winners received the breadboards to be empowered to continue upgrading engineering skills and stay engaged with technologies. First place winners were given SoC Zynq-based boards and logic analyzers. Runner-ups were rewarded with FPGA breadboards. The third-place prize included entry-level development boards.

Besides working on tasks, students had an opportunity to participate in mentoring sessions and network with experts, including Nickolay Ternovoy, RTL Design Engineer at Syntacore. Ilya Losikov, Product Manager at YADRO Microprocessors, spoke about RISC-V architecture and its advantages, and experience of Syntacore and YADRO Microprocessors work in this domain. Alexey Kozhin, Lead Architect at YADRO Microprocessors, shared advice on necessary knowledge, skills and opportunities to succeed in future career in processor design. The SoC Design Challenge has become the first hackathon experience for many students. Participants noted that hackathon tasks required maximum effort and expressed readiness to participate again. 



YADRO is a technology company with in-house R&D focused on designing and developing efficient server and storage products for enterprise workloads, primarily in the context of in-memory computing, hyper scale datacenter, large volume storage and deep learning.

Syntacore is a co-founder of RISC-V consortium and RISC-V processor IP specialist that creates flexible, highly-efficient microprocessor cores that help customers to design unique solutions for the IoT, data storage and processing, embedded systems, cognitive, machine learning and artificial intelligence applications.

YADRO Microprocessors is an emerging vendor designing RISC-V based System-on-Chip for datacenter and consumer market. The company was set up within the YADRO group of companies based on a technological partnership between the leader of the domestic enterprise infrastructure market – YADRO, and one of the global semiconductor IP market leaders and co-founder of RISC-V consortium – Syntacore.

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