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6th Workshop on Computer Architecture Research with RISC-V
June 19, 2022 @ 8:00 am - 5:00 pm PDT
Thursday June 19th, 2022, Co-located with ISCA 2022
The Sixth Workshop on RISC-V for Computer Architecture Research (CARRV) seeks original research papers on the design, implementation, verification, and security evaluation of RISC-V cores, SoCs, and accelerators. Submission of early work is encouraged. The topics of specific interest for the workshop include, but are not limited to:
- RISC-V cores and SoC architectures
- RISC-V security
- RISC-V ISA extensions
- RISC-V-based hardware accelerators
- Security architectures and techniques
- Formal methods
- Verification methodologies
- Hardware/software interfaces
- RISC-V ISA and implementation performance analysis
- RISC-V compilers and dynamic translation tools
Important Dates
- Full paper submission deadline: May 6, 2022, 23:59 PST
- Author notification: May 13, 2022
- Camera-ready (and video) due: June 3, 2022