Stay Connected With RISC-V
We send occasional news about RISC-V technical progress, news, and events.
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Partnering with RISC-V
Adacore
Andes
Gigadevice
Greenwaves
IAR
Imperas
OpenHW
Segger
Siemens
Roundtables
RISC-V with Andes Roundtable March 1, 11-11:30 CET
RISC-V with Greenwaves Roundtable March 2, 11:30 – 12 CET
RISC-V with Imperas Roundtable March 3, 11-11:30 CET
RISC-V with OpenHW Roundtable March 4, 11-1:30 CET
Speaking Sessions in Exhibitor Forum
Exhibitor Forum: RISC-V growth and successes in technology and industry (Kim McMahon & Stephano Cetola, RISC-V International) March 1, 14:10 – 14:20 CET
Exhibitor Forum: GAP – State of the art TinyML and DSP for energy-constrained applications in IoT sensors and hearables (Martin Croome, Greenwaves) March 2, 11-11:20 CET
Exhibitor Forum: RISC-V Everywhere: Why and How (Florian Wohlrab, Andes) March 2 14:20 – 14:40 CET
Exhibitor Forum: What’s next for RISC-V? Vectors, Verification, and Value-added Extensions (Simon Davidmann, Imperas) March 3, 14:20 – 14:40 CET
Exhibitor Forum: A complete eco-system for RISC-V based embedded systems (Dirk Akemann, SEGGER) March 4, 14:20 – 14:40 CET
Exhibitor Forum: CORE-V: Industrial Grade, Open-Source RISC-V Cores (Rick O’Connor, OpenHW) March 5, 14:20 – 14:40
RISC-V Presentations:
Speaking Session | Speaker | Date | Time | Company |
Day 1 | ||||
Operating Systems for Embedded Applications | Colin Walls | March 1 | 11:30 – 12:00 | Mentor, a Siemens Business |
Hypervisor or Multicore Framework: Which is Best? | Colin Walls | March 1 | 17:15 – 17:45 | Mentor, a Siemens Business |
Track Keynote: Power Management in Embedded Systems | Colin Walls | March 1 | 16:15 – 16:45 | Mentor, a Siemens Business |
Day 2 | ||||
Functional Safety: Software Partitioning and Functionality Assignment for Complex and High Performance Architectures | Dr. Ahmed Khan | March 2 | 11:30 – 12:00 | Siemens Digital Industries Software |
Embedded Software Development to Manage the Complexities of Today’s Automotive Distributed Systems | Brendan Morris | March 2 | 14:30 – 15:00 | Siemens Digital Industries Software |
Software Driven SoC Architectural Exploration for AI and ML Accelerators With RISC-V | Simon Davidmann | March 2 | 16:45 – 17:15 | Imperas Software |
Quantizing Edge Neural Networks With Qkeras | Russell Klein | March 2 | 17:15 – 17:45 | Mentor, a Siemens Business |
Day 3 | ||||
Secure IoT Firmware For RISC-V Processors | Cesare Garlati | March 3 | 13:30 – 14:00 | Hex Five Security |
Quantizing Edge Neural Networks With Qkeras | Russell Klein | March 3 | 17:15 – 17:45 | Mentor, a Siemens Business |
Day 4 | ||||
Secure Diagnostics for Connected Vehicles | Dr. Ahmed Khan | March 4 | 12:00 – 12:30 | Siemens Digital Industries Software |
Standardizing the TEE – The IoT Opportunity | Gil Bernabeu | March 4 | 14:30 – 15:00 | GlobalPlatform |
Real-time Remote Diagnostics for In-production Automotive Ethernet ECUs | Dr. Ahmed Khan | March 4 | 16:45 – 17:15 | Siemens Digital Industries Software |
Dynamic Memory Allocation & Fragmentation in C & C++ | Colin Walls | March 4 | 16:15 – 16:45 | Mentor, a Siemens Business |
Day 5 | ||||
Self-testing in Embedded Systems | Colin Walls | March 5 | 11:30 – 12:00 | Mentor, a Siemens Business |
Leveraging RISC-V Technology for Industry Use | Prof. Robert Oshana & Rick O’Connor | March 5 | 11:30 – 12:00 | OpenHW Group |
Working Effectively With Standard and Custom RISC-V ISA Extensions | Felipe Torrezan | March 5 | 12:00 – 12:30 | IAR Systems |
We send occasional news about RISC-V technical progress, news, and events.