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Embedded Computing Design Article: Esperanto Technologies to Develop Energy-Efficient AI Chips on RISC-V Architecture

By November 28, 2017May 12th, 2021No Comments

In a presentation at the 7th RISC-V Workshop, Esperanto Technologies announced that it plans to develop energy-efficient computing solutions for artificial intelligence (AI) and machine learning based on the open standard RISC-V Instruction Set Architecture (ISA). The company’s first RISC-V AI system on chips (SoCs) will leverage 16 ET-Maxion 64-bit RISC-V cores, 4,096 energy-efficient ET-Minion RISC-V cores (each with a vector floating point unit), and be designed on 7 nm CMOS process technology.
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