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Semiconductor Engineering Article: Heterogeneous Hubbub

By March 14, 2018No Comments

It’s no secret that designers today would prefer not to be restricted in their architectural choices. And who can blame them? At the same time, this sentiment has boosted interest and usage of both heterogenous architectures as well as the RISC-V ISA.
To support this, companies across the design, test and verification ecosystem are ramping efforts. One such effort is the teaming of UltraSoC and Lauterbach working together on what they call a universal SoC development and debug environment which includes support for the RISC-V open-source processor architecture.
What I find interesting is how RISC-V came to be, and how it is ramping.
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